| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveRegUnits.h | 144 void addUnits(const BitVector &RegUnits) { in addUnits()
148 void removeUnits(const BitVector &RegUnits) { in removeUnits()
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineTraceMetrics.cpp | 718 updatePhysDepsDownwards(const MachineInstr * UseMI,SmallVectorImpl<DataDep> & Deps,SparseSet<LiveRegUnit> & RegUnits,const TargetRegisterInfo * TRI) updatePhysDepsDownwards() argument
796 updateDepth(MachineTraceMetrics::TraceBlockInfo & TBI,const MachineInstr & UseMI,SparseSet<LiveRegUnit> & RegUnits) updateDepth() argument
835 updateDepth(const MachineBasicBlock * MBB,const MachineInstr & UseMI,SparseSet<LiveRegUnit> & RegUnits) updateDepth() argument
842 updateDepths(MachineBasicBlock::iterator Start,MachineBasicBlock::iterator End,SparseSet<LiveRegUnit> & RegUnits) updateDepths() argument
868 SparseSet<LiveRegUnit> RegUnits; computeInstrDepths() local
906 updatePhysDepsUpwards(const MachineInstr & MI,unsigned Height,SparseSet<LiveRegUnit> & RegUnits,const TargetSchedModel & SchedModel,const TargetInstrInfo * TII,const TargetRegisterInfo * TRI) updatePhysDepsUpwards() argument
1029 SparseSet<LiveRegUnit> RegUnits; computeInstrHeights() local
[all...] |
| H A D | InterferenceCache.h | 92 SmallVector<RegUnitInfo, 4> RegUnits; variable
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| H A D | MachineCombiner.cpp | 488 insertDeleteInstructions(MachineBasicBlock * MBB,MachineInstr & MI,SmallVectorImpl<MachineInstr * > & InsInstrs,SmallVectorImpl<MachineInstr * > & DelInstrs,MachineTraceMetrics::Ensemble * TraceEnsemble,SparseSet<LiveRegUnit> & RegUnits,const TargetInstrInfo * TII,unsigned Pattern,bool IncrementalUpdate) insertDeleteInstructions() argument
571 SparseSet<LiveRegUnit> RegUnits; combineInstructions() local
[all...] |
| H A D | RegisterPressure.cpp | 370 getRegLanes(ArrayRef<RegisterMaskPair> RegUnits,Register RegUnit) getRegLanes() argument
380 addRegLanes(SmallVectorImpl<RegisterMaskPair> & RegUnits,RegisterMaskPair Pair) addRegLanes() argument
394 setRegZero(SmallVectorImpl<RegisterMaskPair> & RegUnits,Register RegUnit) setRegZero() argument
406 removeRegLanes(SmallVectorImpl<RegisterMaskPair> & RegUnits,RegisterMaskPair Pair) removeRegLanes() argument
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInsertSingleUseVDST.cpp | |
| /llvm-project/llvm/utils/TableGen/ |
| H A D | RegisterInfoEmitter.cpp | 193 const RegUnitSet &RegUnits = Bank.getRegSetAt(i); runEnums() local
223 std::vector<unsigned> RegUnits; EmitRegUnitPressure() local
273 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); EmitRegUnitPressure() local
289 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); EmitRegUnitPressure() local
[all...] |
| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.h | 302 RegUnitList RegUnits; variable
603 SmallVector<RegUnit, 8> RegUnits; global() variable
[all...] |
| H A D | CodeGenRegisters.cpp | 2167 const auto &RegUnits = Register.getRegUnits(); computeRegUnitLaneMasks() local
[all...] |
| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 124 uint32_t RegUnits; member
|