| /llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterPressure.cpp | 363 if (RegUnit.isVirtual() && !RPTracker.hasUntiedDef(RegUnit)) in initLiveThru() local
155 increaseRegPressure(Register RegUnit,LaneBitmask PreviousMask,LaneBitmask NewMask) increaseRegPressure() argument
170 decreaseRegPressure(Register RegUnit,LaneBitmask PreviousMask,LaneBitmask NewMask) decreaseRegPressure() argument
371 getRegLanes(ArrayRef<RegisterMaskPair> RegUnits,Register RegUnit) getRegLanes() argument
382 Register RegUnit = Pair.RegUnit; addRegLanes() local
395 setRegZero(SmallVectorImpl<RegisterMaskPair> & RegUnits,Register RegUnit) setRegZero() argument
408 Register RegUnit = Pair.RegUnit; removeRegLanes() local
422 getLanesWithProperty(const LiveIntervals & LIS,const MachineRegisterInfo & MRI,bool TrackLaneMasks,Register RegUnit,SlotIndex Pos,LaneBitmask SafeDefault,bool (* Property)(const LiveRange & LR,SlotIndex Pos)) getLanesWithProperty() argument
451 getLiveLanesAt(const LiveIntervals & LIS,const MachineRegisterInfo & MRI,bool TrackLaneMasks,Register RegUnit,SlotIndex Pos) getLiveLanesAt() argument
607 Register RegUnit = I->RegUnit; adjustLaneLiveness() local
627 Register RegUnit = P.RegUnit; adjustLaneLiveness() local
663 addPressureChange(Register RegUnit,bool IsDec,const MachineRegisterInfo * MRI) addPressureChange() argument
710 Register RegUnit = Pair.RegUnit; discoverLiveInOrOut() local
836 Register RegUnit = Def.RegUnit; recede() local
1245 getLiveLanesAt(Register RegUnit,SlotIndex Pos) const getLiveLanesAt() argument
1255 getLastUsedLanes(Register RegUnit,SlotIndex Pos) const getLastUsedLanes() argument
1266 getLiveThroughAt(Register RegUnit,SlotIndex Pos) const getLiveThroughAt() argument
[all...] |
| H A D | LiveRegMatrix.cpp | 179 query(const LiveRange & LR,MCRegister RegUnit) query() argument
|
| H A D | MachineCopyPropagation.cpp | 254 findCopyForUnit(MCRegister RegUnit,const TargetRegisterInfo & TRI,bool MustBeAvailable=false) findCopyForUnit() argument
265 findCopyDefViaUnit(MCRegister RegUnit,const TargetRegisterInfo & TRI) findCopyDefViaUnit() argument
|
| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.h | 534 struct RegUnit { global() struct
540 WeightRegUnit global() argument
552 RegUnitRegUnit RegUnit() argument
562 getRootsRegUnit global() argument
[all...] |
| H A D | CodeGenRegisters.cpp | 602 for (unsigned RegUnit : RegUnits) { getWeight() local
|
| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAGInstrs.h | 79 unsigned RegUnit; global() member
|
| H A D | MachineTraceMetrics.h | 75 unsigned RegUnit; global() member
|
| H A D | MachineRegisterInfo.h | 1248 PSetIterator(Register RegUnit,const MachineRegisterInfo * MRI) PSetIterator() argument
1277 getPressureSets(Register RegUnit) getPressureSets() argument
|
| H A D | RegisterPressure.h | 39 Register RegUnit; ///< Virtual register or register unit. member
[all...] |
| H A D | TargetRegisterInfo.h | 458 hasRegUnit(MCRegister Reg,Register RegUnit) hasRegUnit() argument
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 324 LiveRange &RegUnit = LIS->getRegUnit(Unit); in optimizeElseBranch() local
|
| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 707 MCRegUnitRootIterator(unsigned RegUnit,const MCRegisterInfo * MCRI) MCRegUnitRootIterator() argument
|
| /llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfDebug.cpp | 718 for (auto &RegUnit : ClobberedRegUnits) in interpretValues() local
|