| /freebsd-src/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | BPF.cpp | 40 llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), 64); in classifyArgumentType() local
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| H A D | PPC.cpp | 824 llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), RegBits); classifyArgumentType() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 489 extractParts(Register Reg,LLT RegTy,LLT MainTy,LLT & LeftoverTy,SmallVectorImpl<Register> & VRegs,SmallVectorImpl<Register> & LeftoverRegs,MachineIRBuilder & MIRBuilder,MachineRegisterInfo & MRI) extractParts() argument
588 LLT RegTy = MRI.getType(Reg); extractVectorParts() local
884 getFunctionLiveInPhysReg(MachineFunction & MF,const TargetInstrInfo & TII,MCRegister PhysReg,const TargetRegisterClass & RC,const DebugLoc & DL,LLT RegTy) getFunctionLiveInPhysReg() argument
[all...] |
| H A D | RegBankSelect.cpp | 174 LLT RegTy = MRI->getType(MO.getReg()); in repairReg() local
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| H A D | CallLowering.cpp | 1272 const LLT RegTy = MRI.getType(ValVReg); assignValueToReg() local
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| H A D | CombinerHelper.cpp | 764 LLT RegTy = MRI.getType(LoadReg); matchCombineLoadWithAndMask() local
877 LLT RegTy = MRI.getType(DstReg); matchSextInRegOfLoad() local
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| H A D | LegalizerHelper.cpp | 5571 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); narrowScalarAddSub() local
5748 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); narrowScalarInsert() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterBankInfo.cpp | 451 LLT RegTy = MRI.getType(Op.getReg()); getInstrMapping() local
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| H A D | MipsCallLowering.cpp | 428 LLT RegTy = LLT::scalar(RegSize * 8); in lowerFormalArguments() local
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| H A D | MipsISelLowering.cpp | 4386 MVT RegTy = MVT::getIntegerVT(GPRSizeInBytes * 8); copyByValRegs() local
4415 RegTy = MVT::getIntegerVT(RegSizeInBytes * 8); passByValArg() local
4505 MVT RegTy = MVT::getIntegerVT(RegSizeInBytes * 8); writeVarArgRegs() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 94 const LLT RegTy = getType(Reg); constrainRegAttrs() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 200 struct RegTy { global() struct
201 RegNum__anon453836c60111::HexagonOperand::RegTy global() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1586 const LLT RegTy = MRI.getType(DstReg); selectMulDivRem() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 3955 MVT RegTy = MemTy == MVT::i64 ? MVT::i64 : MVT::i32; SelectCMP_SWAP() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 6346 LLT RegTy; legalizeImageIntrinsic() local
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