Home
last modified time | relevance | path

Searched defs:RegSize (Results 1 – 25 of 32) sorted by relevance

12

/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MIPeepholeOpt.cpp152 splitBitmaskImm(T Imm,unsigned RegSize,T & Imm1Enc,T & Imm2Enc) splitBitmaskImm() argument
205 __anon0cefc1b50202(T Imm, unsigned RegSize, T &Imm0, T &Imm1) visitAND() argument
331 splitAddSubImm(T Imm,unsigned RegSize,T & Imm0,T & Imm1) splitAddSubImm() argument
376 __anon0cefc1b50402(T Imm, unsigned RegSize, T &Imm0, T &Imm1) visitADDSUB() argument
413 __anon0cefc1b50602(T Imm, unsigned RegSize, T &Imm0, T &Imm1) visitADDSSUBS() argument
489 unsigned RegSize = sizeof(T) * 8; splitTwoPartImm() local
[all...]
H A DAArch64FastISel.cpp1671 unsigned RegSize; emitLogicalOp_ri() local
4112 unsigned RegSize = Is64Bit ? 64 : 32; emitLSL_ri() local
4215 unsigned RegSize = Is64Bit ? 64 : 32; emitLSR_ri() local
4331 unsigned RegSize = Is64Bit ? 64 : 32; emitASR_ri() local
[all...]
H A DAArch64FrameLowering.cpp3577 auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8; determineCalleeSaves() local
/llvm-project/llvm/lib/Target/Mips/
H A DMipsFrameLowering.cpp127 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); estimateStackSize() local
H A DMipsSEFrameLowering.cpp198 expandLoadACC(MachineBasicBlock & MBB,Iter I,unsigned RegSize) expandLoadACC() argument
223 expandStoreACC(MachineBasicBlock & MBB,Iter I,unsigned MFHiOpc,unsigned MFLoOpc,unsigned RegSize) expandStoreACC() argument
H A DMipsCallLowering.cpp413 unsigned RegSize = 4; in lowerFormalArguments() local
/llvm-project/llvm/lib/Target/X86/
H A DX86TileConfig.cpp184 unsigned RegSize = TRI->getRegSizeInBits(*MRI.getRegClass(R)); INITIALIZE_PASS_DEPENDENCY() local
H A DX86InstrInfo.cpp7572 unsigned RegSize = TRI.getRegSizeInBits(*RC); isNonFoldablePartialRegisterLoad() local
/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp139 unsigned RegSize = TRI.getRegSizeInBits(*RC); addMachineReg() local
292 unsigned RegSize = 0; addMachineRegExpression() local
/llvm-project/llvm/utils/TableGen/Common/
H A DInfoByHwMode.h182 unsigned RegSize; global() member
/llvm-project/clang/lib/Basic/Targets/
H A DX86.h246 validateGlobalRegisterVariable(StringRef RegName,unsigned RegSize,bool & HasSizeMismatch) validateGlobalRegisterVariable() argument
802 validateGlobalRegisterVariable(StringRef RegName,unsigned RegSize,bool & HasSizeMismatch) validateGlobalRegisterVariable() argument
H A DAArch64.cpp225 validateGlobalRegisterVariable(StringRef RegName,unsigned RegSize,bool & HasSizeMismatch) const validateGlobalRegisterVariable() argument
/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYFrameLowering.cpp429 auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8; in determineCalleeSaves() local
/llvm-project/clang/lib/CodeGen/
H A DCGRecordLayoutBuilder.cpp505 CharUnits RegSize = in accumulateBitFields() local
/llvm-project/clang/lib/CodeGen/Targets/
H A DAArch64.cpp600 int RegSize = IsIndirect ? 8 : TySize.getQuantity(); EmitAAPCSVAArg() local
H A DPPC.cpp510 CharUnits RegSize = CharUnits::fromQuantity((isInt || IsSoftFloatABI) ? 4 : 8); EmitVAArg() local
/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h213 static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize, in processLogicalImmediate()
/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h243 unsigned RegSize, SpillSize, SpillAlignment; global() member
/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp1038 unsigned RegSize = getPointerSize(); assignCalleeSavedSpillSlots() local
H A DSystemZInstrInfo.cpp1040 unsigned RegSize = 0; global() member
/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp1050 uint32_t RegSize = 0; runMCDesc() local
/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp509 unsigned RegSize = RegTy.getSizeInBits(); extractParts() local
/llvm-project/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp560 int RegSize; sizeOfSPAdjustment() local
/llvm-project/clang/include/clang/Basic/
H A DTargetInfo.h1191 validateGlobalRegisterVariable(StringRef RegName,unsigned RegSize,bool & HasSizeMismatch) validateGlobalRegisterVariable() argument
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp876 unsigned RegSize = RegVT.getSizeInBits(); LowerFormalArguments() local

12