[NVPTX] add support for encoding PTX registers for DWARF (#109495)

This patch adds support for encoding PTX registers for DWARF, using the
encoding supported by nvcc and cuda-gcc.

There are some

[NVPTX] add support for encoding PTX registers for DWARF (#109495)

This patch adds support for encoding PTX registers for DWARF, using the
encoding supported by nvcc and cuda-gcc.

There are some other features still needed for proper register debugging
that this patch does not address, such as DW_AT_address_class.

This PR is stacked on: https://github.com/llvm/llvm-project/pull/109494

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[llvm] use 64-bit types for result of getDwarfRegNum (NFC) (#109494)

The register encoding used by NVPTX and cuda-gdb basically use strings
encoded as numbers. They are always within 64-bits, but t

[llvm] use 64-bit types for result of getDwarfRegNum (NFC) (#109494)

The register encoding used by NVPTX and cuda-gdb basically use strings
encoded as numbers. They are always within 64-bits, but typically
outside of 32-bits, since they often need at least 5 characters.

This patch changes the signature of `MCRegisterInfo::getDwarfRegNum` and
some related data structures to use 64-bit numbers to accommodate
encodings like this.

Additionally, `MCRegisterInfo::getDwarfRegNum` is marked as virtual, so
that targets with peculiar dwarf register mapping schemes (such as
NVPTX) can override its behavior.

I originally tried to do a broader switch to 64-bit types for registers,
but it caused many problems. There are various places in code generation
where registers are not just treated as 32-bit numbers, but also treat
certain bit offsets as flags. So I limited the change as much as
possible to just the output of `getDwarfRegNum`. Keeping the types used
by `DwarfLLVMRegPair` as unsigned preserves the current behaviors. The
only way to give a 64-bit output from `getDwarfRegNum` that actually
needs more than 32-bits is to override `getDwarfRegNum` and provide an
implementation that sidesteps the use of the `DwarfLLVMRegPair` maps
defined in tablegen files.

First layer of stack supporting:
https://github.com/llvm/llvm-project/pull/109495

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[DebugInfo] Use DW_OP_deref_size for DW_OP_LLVM_extract_bits (#97609)

Using DW_OP_deref can result in the debugger reading past the end of an
object into inaccessible memory, causing an error. Inst

[DebugInfo] Use DW_OP_deref_size for DW_OP_LLVM_extract_bits (#97609)

Using DW_OP_deref can result in the debugger reading past the end of an
object into inaccessible memory, causing an error. Instead use
DW_OP_deref_size to make sure we don't read any bytes beyond what we
need to.

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[DebugInfo] Add DW_OP_LLVM_extract_bits (#93990)

This operation extracts a number of bits at a given offset and sign or
zero extends them, which is done by emitting it as a left shift followed
by

[DebugInfo] Add DW_OP_LLVM_extract_bits (#93990)

This operation extracts a number of bits at a given offset and sign or
zero extends them, which is done by emitting it as a left shift followed
by a right shift.

This is being added for use in clang for C++ structured bindings of
bitfields that have offset or size that aren't a byte multiple. A new
operation is being added, instead of shifts being used directly, as it
makes correctly handling it in optimisations (which will be done in a
later patch) much easier.

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[AsmPrinter][DebugInfo] Create EntryValue mode for DbgVariable

With D149881, we converted EntryValue MachineFunction table entries into
`DbgVariables` initialized by a "DbgValue" intrinsic, which ca

[AsmPrinter][DebugInfo] Create EntryValue mode for DbgVariable

With D149881, we converted EntryValue MachineFunction table entries into
`DbgVariables` initialized by a "DbgValue" intrinsic, which can only handle a
single, non-fragment DIExpression. However, it is desirable to handle variables
with multiple fragments and DIExpressions.

To do this, we expand the `DbgVariable` class to handle the EntryValue case.
This class can already operate under three different "modes" (stack slot,
unchanging location described by a dbg value, changing location described by a
loc list). A fourth case is added as a separate class entirely, but a subsequent
patch should redesign `DbgVariable` with four subclasses in order to make the
code more readable.

This patch also exposed a bug in the `beginEntryValueExpression` function, which
was not initializing the `LocationFlags` properly. Note how the
`finalizeEntryValue` function resets that flag. We fix this bug here, as testing
this changing in isolation would be tricky.

Differential Revision: https://reviews.llvm.org/D158458

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Add support for salvaging debug info from icmp instrcuctions.

salvageDebugInfo is a function that allows us to reatin debug info for
instructions that have been optimized out. Currently, it doesn't

Add support for salvaging debug info from icmp instrcuctions.

salvageDebugInfo is a function that allows us to reatin debug info for
instructions that have been optimized out. Currently, it doesn't support
salvaging the debug information from icmp instrcutions, but DWARF
expressions can emulate an icmp by using the DWARF conditional
expressions. This patch adds support for salvaging debug information
from icmp instructions.

Differential Revision: https://reviews.llvm.org/D150216

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[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.

Differential Revision: https://reviews.llvm.org/D148613

[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC

Use isPhysical/isVirtual methods.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D141715

[CodeGen] llvm::Optional => std::optional

[CodeGen] Use std::nullopt instead of None (NFC)

This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated. The intent is to reduce
the amount of

[CodeGen] Use std::nullopt instead of None (NFC)

This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated. The intent is to reduce
the amount of manual work required in migrating from Optional to
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

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Remove redundant initialization of Optional (NFC)

[DWARF][FIX] Handle the use of multiple registers gracefully

Certain applications crashed for us with the AMDGPU backend. While this
is not a proper fix it allows us to compile the code for now. I l

[DWARF][FIX] Handle the use of multiple registers gracefully

Certain applications crashed for us with the AMDGPU backend. While this
is not a proper fix it allows us to compile the code for now. I left a
TODO for someone that understands DWARF.

Differential Revision: https://reviews.llvm.org/D123717

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Fix a fragment overflow problem when composing super-registers.

Addresses https://github.com/llvm/llvm-project/issues/53342

Differential Revision: https://reviews.llvm.org/D118412

Fix UB in DwarfExpression::emitLegacyZExt()

A shift-left > 63 triggers a UBSAN failure. This patch kicks the can
down the road (to the consumer) by emitting a more compact
representation of the shif

Fix UB in DwarfExpression::emitLegacyZExt()

A shift-left > 63 triggers a UBSAN failure. This patch kicks the can
down the road (to the consumer) by emitting a more compact
representation of the shift computation in DWARF expressions.

Relanding (I accidentally pushed an earlier version of the patch previously).

Differential Revision: https://reviews.llvm.org/D118183

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Revert "Fix UB in DwarfExpression::emitLegacyZExt()"

This reverts commit 216002c4bb708e6d6fd1895c8ea636470961f824
while investigating bot breakage.

Fix UB in DwarfExpression::emitLegacyZExt()

A shift-left > 63 triggers a UBSAN failure. This patch kicks the can
down the road (to the consumer) by emitting a more compact
representation of the shif

Fix UB in DwarfExpression::emitLegacyZExt()

A shift-left > 63 triggers a UBSAN failure. This patch kicks the can
down the road (to the consumer) by emitting a more compact
representation of the shift computation in DWARF expressions.

Differential Revision: https://reviews.llvm.org/D118183

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Revert accidentally pushed commit. It was not yet reviewed.

"Fix UB in DwarfExpression::emitLegacyZExt()"

This reverts commit e37de5d36e3190283916604342b029859129e2a4.

Fix UB in DwarfExpression::emitLegacyZExt()

A shift-left > 63 triggers a UBSAN failure. This patch kicks the can
down the road (to the consumer) by emitting a more compact
representation of the shif

Fix UB in DwarfExpression::emitLegacyZExt()

A shift-left > 63 triggers a UBSAN failure. This patch kicks the can
down the road (to the consumer) by emitting a more compact
representation of the shift computation in DWARF expressions.

Differential Revision: https://reviews.llvm.org/D118183

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[DwarfDebug] Refuse to emit DW_OP_LLVM_arg values wider than 64 bits

DwarfExpression::addUnsignedConstant(const APInt &Value) only supports
wider-than-64-bit values when it is used to emit a top-lev

[DwarfDebug] Refuse to emit DW_OP_LLVM_arg values wider than 64 bits

DwarfExpression::addUnsignedConstant(const APInt &Value) only supports
wider-than-64-bit values when it is used to emit a top-level DWARF
expression representing the location of a variable. Before this change,
it was possible to call addUnsignedConstant on >64 bit values within a
subexpression when substituting DW_OP_LLVM_arg values.

This can trigger an assertion failure (e.g. PR52584, PR52333) when it
happens in a fragment (DW_OP_LLVM_fragment) expression, as
addUnsignedConstant on >64 bit values splits the constant into separate
DW_OP_pieces, which modifies DwarfExpression::OffsetInBits.

This change papers over the assertion errors by bailing on overly wide
DW_OP_LLVM_arg values. A more comprehensive fix might be to be to split
wide values into pointer-sized fragments.

[0] https://github.com/llvm/llvm-project/blob/e71fa03/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp#L799-L805

Patch by Ricky Zhou!

Differential Revision: https://reviews.llvm.org/D115343

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Fix unused lambda capture in a non-asserts build

For locally scoped lambdas like this there's no particular benefit to
explicitly listing captures - or avoiding capturing this. Switch to [&]
and mak

Fix unused lambda capture in a non-asserts build

For locally scoped lambdas like this there's no particular benefit to
explicitly listing captures - or avoiding capturing this. Switch to [&]
and make it all easier to maintain.

(& driveby change std::function to llvm::function_ref)

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Reapply "[DebugInfo] Add DWARF emission for DBG_VALUE_LIST"

This reverts commit 429c6ecbb302e2beedd8694378ae5be456206209.

Revert "[DebugInfo] Add DWARF emission for DBG_VALUE_LIST"

This reverts commit 0da27ba56c9f5e3f534a65401962301189eac342.

This revision was causing an error on the sanitizer-x86_64-linux-autoconf bu

Revert "[DebugInfo] Add DWARF emission for DBG_VALUE_LIST"

This reverts commit 0da27ba56c9f5e3f534a65401962301189eac342.

This revision was causing an error on the sanitizer-x86_64-linux-autoconf build.

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[DebugInfo] Add DWARF emission for DBG_VALUE_LIST

This patch allows DBG_VALUE_LIST instructions to be emitted to DWARF with valid
DW_AT_locations. This change mainly affects DbgEntityHistoryCalculat

[DebugInfo] Add DWARF emission for DBG_VALUE_LIST

This patch allows DBG_VALUE_LIST instructions to be emitted to DWARF with valid
DW_AT_locations. This change mainly affects DbgEntityHistoryCalculator, which
now tracks multiple registers per value, and DwarfDebug+DwarfExpression, which
can now emit multiple machine locations as part of a DWARF expression.

Differential Revision: https://reviews.llvm.org/D83495

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Reset the EntryValue location flag in finalizeEntryValue.

This fixes an assertion error when entry values are combined with
DW_OP_LLVM_fragment.

Support emitting complex expressions that include entry values

This patch enables AsmPrinter support for complex expression with
entry values. It shouldn't AsmPrinter's call whether these are safe o

Support emitting complex expressions that include entry values

This patch enables AsmPrinter support for complex expression with
entry values. It shouldn't AsmPrinter's call whether these are safe or
not but the pass who introduces the DW_OP_LLVM_entry_value. This patch
on its own has no effect on clang.

Differential Revision: https://reviews.llvm.org/D96559

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