| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 482 /// Returns true if RegB is a sub-register of RegA. in isSuperRegisterEq() argument
488 bool isSuperRegister(MCRegister RegA, MCRegister RegB) const; in isSuperOrSubRegisterEq() argument
468 isSubRegister(MCRegister RegA,MCRegister RegB) isSubRegister() argument
476 isSubRegisterEq(MCRegister RegA,MCRegister RegB) isSubRegisterEq() argument
610 isSuperRegister(MCRegister RegA,MCRegister RegB) isSuperRegister() argument
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 561 isProfitableToCommute(Register RegA,Register RegB,Register RegC,MachineInstr * MI,unsigned Dist) isProfitableToCommute() argument
697 isProfitableToConv3Addr(Register RegA,Register RegB) isProfitableToConv3Addr() argument
715 convertInstTo3Addr(MachineBasicBlock::iterator & mi,MachineBasicBlock::iterator & nmi,Register RegA,Register RegB,unsigned & Dist) convertInstTo3Addr() argument
1494 Register RegB = 0; processTiedPairs() local
1676 Register RegB = TO.first; processStatepoint() local
[all...] |
| H A D | ImplicitNullChecks.cpp | 291 Register RegB = MOB.getReg(); in canReorder() local
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| H A D | TargetInstrInfo.cpp | 1100 Register RegB = OpB.getReg(); reassociateOps() local
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| /llvm-project/llvm/unittests/Analysis/ |
| H A D | SparsePropagation.cpp | 481 auto RegB = TestLatticeKey(B, IPOGrouping::Register); TEST_F() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 674 __anonbd65f2650102(MCRegister RegA, MCRegister RegB) isArgumentRegister() argument
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 449 regsOverlap(Register RegA,Register RegB) regsOverlap() argument
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 500 Register RegB = Root.getOperand(AddOpIdx).getReg(); getFMAPatterns() local
859 RegA21, RegB; reassociateFMA() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2225 for (auto &RegB : UsesB) { isDependent() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6937 Register RegB = AddMI->getOperand(IdxOpd1).getReg(); genSubAdd2SubSub() local
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