Searched defs:ProcModel (Results 1 – 3 of 3) sorted by relevance
/llvm-project/llvm/utils/TableGen/ |
H A D | SubtargetEmitter.cpp | 444 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { EmitStageAndOperandCycleData() local 498 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { EmitStageAndOperandCycleData() local 678 EmitProcessorResourceSubUnits(const CodeGenProcModel & ProcModel,raw_ostream & OS) EmitProcessorResourceSubUnits() argument 700 EmitRetireControlUnitInfo(const CodeGenProcModel & ProcModel,raw_ostream & OS) EmitRetireControlUnitInfo() argument 714 EmitRegisterFileInfo(const CodeGenProcModel & ProcModel,unsigned NumRegisterFiles,unsigned NumCostEntries,raw_ostream & OS) EmitRegisterFileInfo() argument 731 EmitRegisterFileTables(const CodeGenProcModel & ProcModel,raw_ostream & OS) EmitRegisterFileTables() argument 783 EmitLoadStoreQueueInfo(const CodeGenProcModel & ProcModel,raw_ostream & OS) EmitLoadStoreQueueInfo() argument 803 EmitExtraProcessorInfo(const CodeGenProcModel & ProcModel,raw_ostream & OS) EmitExtraProcessorInfo() argument 827 EmitProcessorResources(const CodeGenProcModel & ProcModel,raw_ostream & OS) EmitProcessorResources() argument 884 FindWriteResources(const CodeGenSchedRW & SchedWrite,const CodeGenProcModel & ProcModel) FindWriteResources() argument 944 FindReadAdvance(const CodeGenSchedRW & SchedRead,const CodeGenProcModel & ProcModel) FindReadAdvance() argument 1050 GenSchedClassTables(const CodeGenProcModel & ProcModel,SchedClassTables & SchedTables) GenSchedClassTables() argument 1541 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { EmitSchedModel() local [all...] |
H A D | DFAPacketizerEmitter.cpp | 219 for (const CodeGenProcModel &ProcModel : CGS.procModels()) { run() local
|
/llvm-project/llvm/utils/TableGen/Common/ |
H A D | CodeGenSchedule.cpp | 941 const CodeGenProcModel &ProcModel = collectSchedClasses() local 1979 for (const CodeGenProcModel &ProcModel : procModels()) { checkCompleteness() local [all...] |