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Searched defs:OpWidth (Results 1 – 6 of 6) sorted by relevance

/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp156 DECODE_SrcOp(Name,EncSize,OpWidth,EncImm,MandatoryLiteral,ImmWidth) global() argument
168 decodeSrcOp(MCInst & Inst,unsigned EncSize,AMDGPUDisassembler::OpWidthTy OpWidth,unsigned Imm,unsigned EncImm,bool MandatoryLiteral,unsigned ImmWidth,AMDGPU::OperandSemantics Sema,const MCDisassembler * Decoder) decodeSrcOp() argument
181 DECODE_OPERAND_REG_7(RegClass,OpWidth) global() argument
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/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1580 unsigned OpWidth = cast<FixedVectorType>(Shuffle->getOperand(0)->getType()) SimplifyDemandedVectorElts() local
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H A DInstCombineCasts.cpp1728 unsigned OpWidth = BO->getType()->getFPMantissaWidth(); visitFPTrunc() local
H A DInstCombineCompares.cpp7543 unsigned OpWidth = Op0->getType()->getScalarSizeInBits(); visitICmpInst() local
/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp2312 unsigned OpWidth = std::max(Op1Info.Width, Op2Info.Width); EmitCheckedMixedSignMultiply() local
/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp30480 unsigned OpWidth = MemType->getPrimitiveSizeInBits(); needsCmpXchgNb() local
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