| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCA/ |
| H A D | AMDGPUCustomBehaviour.cpp | 192 const MCAOperand *OpReg = Inst.getOperand(0); computeWaitCnt() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 1732 Register OpReg = getRegForValue(TI->getOperand(0)); X86SelectBranch() local
1767 Register OpReg = getRegForValue(BI->getCondition()); X86SelectBranch() local
1789 unsigned CReg = 0, OpReg = 0; X86SelectShift() local
2360 Register OpReg = getRegForValue(Opnd); X86SelectSelect() local
2405 Register OpReg = getRegForValue(I->getOperand(0)); X86SelectIntToFP() local
2459 Register OpReg = getRegForValue(I->getOperand(0)); X86SelectFPExtOrFPTrunc() local
[all...] |
| H A D | X86SpeculativeLoadHardening.cpp | 1649 Register OpReg = Op->getReg(); hardenLoadAddr() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 297 Register OpReg = MO.getReg(); in optimizeSDPattern() local
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| H A D | ARMInstructionSelector.cpp | 1043 Register OpReg = I.getOperand(2).getReg(); select() local
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| H A D | ARMFastISel.cpp | 1263 Register OpReg = getRegForValue(TI->getOperand(0)); in SelectBranch() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 251 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); getRegOperandNumElts() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4611 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSge() local
4748 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSle() local
5439 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSeq() local
5520 unsigned OpReg = Inst.getOperand(2).getReg(); expandSne() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1680 Register OpReg = getRegForValue(In); selectFNeg() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 879 Register OpReg = Op.getReg(); in executeInWaterfallLoop() local
3593 Register OpReg = MI.getOperand(I).getReg(); getImageMapping() local
[all...] |
| H A D | AMDGPUInstructionSelector.cpp | 2694 BuildMI(*BB, &MI, DL, TII.get(AMDGPU::S_AND_B32), OpReg) in selectG_FNEG() local
2732 Register OpReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); selectG_FABS() local
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| H A D | GCNHazardRecognizer.cpp | 2830 Register OpReg = Op.getReg(); fixVALUMaskWriteHazard() local
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| H A D | SIInstrInfo.cpp | 6107 Register OpReg = Op.getReg(); legalizeGenericOperand() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 1999 Register OpReg = MO.getReg(); clearRegisterKills() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 5691 Register OpReg = MI.getOperand(0).getReg(); narrowScalarExtract() local
5757 Register OpReg = MI.getOperand(2).getReg(); narrowScalarInsert() local
8030 Register OpReg = MI.getOperand(1).getReg(); lowerAbsToAddXor() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 7362 unsigned OpReg = Inst.getOperand(i).getReg(); checkLowRegisterList() local
7376 unsigned OpReg = Inst.getOperand(i).getReg(); listContainsReg() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 7745 Register OpReg = MO.getReg(); fixupPHIOpBanks() local
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