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Searched defs:OpInfo (Results 1 – 25 of 46) sorted by relevance

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/llvm-project/llvm/unittests/MC/X86/
H A DX86MCDisassemblerTest.cpp66 struct OpInfo { struct in __anon1bc103070111::X86MCSymbolizerTest
67 int64_t Value = 0;
68 uint64_t Offset = 0;
69 uint64_t Size;
/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp58 void update(const TargetLowering::AsmOperandInfo &OpInfo) { in update()
82 GISelAsmOperandInfo &OpInfo, in getRegistersForValue()
137 TargetLowering::AsmOperandInfo &OpInfo) { in computeConstraintToUse()
239 GISelAsmOperandInfo &OpInfo = ConstraintOperands.back(); in lowerInlineAsm() local
310 for (auto &OpInfo : ConstraintOperands) { in lowerInlineAsm() local
570 GISelAsmOperandInfo &OpInfo = OutputOperands[i]; in lowerInlineAsm() local
H A DLegalizerInfo.cpp337 ArrayRef<MCOperandInfo> OpInfo = MI.getDesc().operands(); in getAction() local
387 [](unsigned Acc, const MCOperandInfo &OpInfo) { in verify()
394 [](unsigned Acc, const MCOperandInfo &OpInfo) { in verify()
/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsSizeReduction.cpp65 struct OpInfo { struct
66 OpInfo(enum OperandTransfer TransferOperands) in OpInfo() argument
68 OpInfo() : TransferOperands(OT_NA) {} in OpInfo() function
71 TransferOperands; ///< Operands to transfer to the new instruction
/llvm-project/llvm/utils/TableGen/Common/
H A DAsmWriterInst.cpp177 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; in AsmWriterInst() local
H A DCodeGenInstruction.cpp139 OperandInfo &OpInfo = OperandList.emplace_back( in CGIOperandList() local
H A DCodeGenSchedule.h366 OpcodeGroup(OpcodeInfo && OpInfo) OpcodeGroup() argument
/llvm-project/llvm/include/llvm/Bitstream/
H A DBitCodes.h119 void Add(const BitCodeAbbrevOp &OpInfo) { in Add()
/llvm-project/llvm/unittests/CodeGen/
H A DMachineInstrTest.cpp58 MCOperandInfo OpInfo[2]; in TEST() member
130 MCOperandInfo OpInfo[2]; in TEST() member
209 MCOperandInfo OpInfo; in TEST() member
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp333 handleMiddleInst(const MachineInstr & MI,LOHInfo & DefInfo,LOHInfo & OpInfo) handleMiddleInst() argument
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/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp1338 getStoreImmCost(Type * Ty,TTI::OperandValueInfo OpInfo,TTI::TargetCostKind CostKind) getStoreImmCost() argument
1361 getMemoryOpCost(unsigned Opcode,Type * Src,MaybeAlign Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) getMemoryOpCost() argument
1672 __anon2ebf0c050302(unsigned Operand, TTI::OperandValueInfo OpInfo) getArithmeticInstrCost() argument
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/llvm-project/llvm/tools/llvm-exegesis/lib/
H A DMCInstrDescView.cpp113 const auto &OpInfo = Description->operands()[OpIndex]; create() local
H A DAssembler.cpp164 const MCOperandInfo &OpInfo = MCID.operands().begin()[OpIndex]; in addInstruction() local
/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp254 getLitEncoding(const MCOperand & MO,const MCOperandInfo & OpInfo,const MCSubtargetInfo & STI) const getLitEncoding() argument
/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h240 auto OpInfo = reinterpret_cast<const MCOperandInfo *>(this + Opcode + 1); in operands() local
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.cpp168 TTI::OperandValueInfo OpInfo, in getMemoryOpCost() argument
/llvm-project/llvm/utils/TableGen/
H A DDecoderEmitter.cpp1180 bool UseInsertBits = OpInfo.numFields() != 1 || OpInfo.InitValue != 0; in emitBinaryParser() argument
1976 addOneOperandFields(const Record & EncodingDef,const BitsInit & Bits,std::map<std::string,std::string> & TiedNames,StringRef OpName,OperandInfo & OpInfo) addOneOperandFields() argument
2100 OperandInfo OpInfo = getOpInfo(OpTypeRec); populateInstruction() local
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H A DAsmMatcherEmitter.cpp1805 for (const CGIOperandList::OperandInfo &OpInfo : ResultInst->Operands) { buildInstructionResultOperands() local
1864 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; buildAliasResultOperands() local
2112 const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i]; emitConvertFuncs() local
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/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h1010 isInlineConstant(const MachineOperand & MO,const MCOperandInfo & OpInfo) isInlineConstant() argument
1106 const MCOperandInfo &OpInfo = get(Opcode).operands()[OpNo]; getOpSize() local
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/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp770 getMemoryOpCost(unsigned Opcode,Type * Src,MaybeAlign Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) getMemoryOpCost() argument
/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h1354 getOperandSize(const MCOperandInfo & OpInfo) getOperandSize() argument
/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp1162 getMemoryOpCost(unsigned Opcode,Type * Src,MaybeAlign Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) getMemoryOpCost() argument
/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h685 getMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) getMemoryOpCost() argument
1275 TTI::OperandValueInfo OpInfo = TTI::getOperandInfo(Operands[0]); getInstructionCost() local
/llvm-project/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp834 OperandValueKind OpInfo = OK_AnyValue; getOperandInfo() local
1057 getMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) const getMemoryOpCost() argument
/llvm-project/lldb/source/Plugins/Disassembler/LLVMC/
H A DDisassemblerLLVMC.cpp1719 int DisassemblerLLVMC::OpInfo(uint64_t PC, uint64_t Offset, uint64_t Size, OpInfo() function in DisassemblerLLVMC

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