/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
H A D | XCoreDisassembler.cpp | 216 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction() 234 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction() 322 unsigned Op1, Op2; in Decode2RInstruction() local 335 unsigned Op1, Op2; in Decode2RImmInstruction() local 348 unsigned Op1, Op2; in DecodeR2RInstruction() local 361 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local 375 unsigned Op1, Op2; in DecodeRUSInstruction() local 388 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local 401 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local 486 unsigned Op1, Op2; in DecodeL2RInstruction() local [all …]
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/llvm-project/llvm/lib/Analysis/ |
H A D | OverflowInstAnalysis.cpp | 21 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd, in isCheckForZeroAndMulWithOverflow() argument 67 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, in isCheckForZeroAndMulWithOverflow() argument
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H A D | InstructionSimplify.cpp | 301 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); simplifyAssociativeBinOp() local 608 foldOrCommuteConstant(Instruction::BinaryOps Opcode,Value * & Op0,Value * & Op1,const SimplifyQuery & Q) foldOrCommuteConstant() argument 635 simplifyAddInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAddInst() argument 702 simplifyAddInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Query) simplifyAddInst() argument 753 simplifyByDomEq(unsigned Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyByDomEq() argument 787 simplifySubInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifySubInst() argument 923 simplifySubInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q) simplifySubInst() argument 930 simplifyMulInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyMulInst() argument 995 simplifyMulInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q) simplifyMulInst() argument 1079 simplifyDivRem(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyDivRem() argument 1185 simplifyDiv(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyDiv() argument 1220 simplifyRem(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyRem() argument 1257 simplifySDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifySDivInst() argument 1266 simplifySDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifySDivInst() argument 1273 simplifyUDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyUDivInst() argument 1278 simplifyUDivInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifyUDivInst() argument 1285 simplifySRemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifySRemInst() argument 1300 simplifySRemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifySRemInst() argument 1306 simplifyURemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyURemInst() argument 1311 simplifyURemInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyURemInst() argument 1348 simplifyShift(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,bool IsNSW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyShift() argument 1418 simplifyRightShift(Instruction::BinaryOps Opcode,Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyRightShift() argument 1446 simplifyShlInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyShlInst() argument 1480 simplifyShlInst(Value * Op0,Value * Op1,bool IsNSW,bool IsNUW,const SimplifyQuery & Q) simplifyShlInst() argument 1487 simplifyLShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyLShrInst() argument 1517 simplifyLShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifyLShrInst() argument 1524 simplifyAShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAShrInst() argument 1550 simplifyAShrInst(Value * Op0,Value * Op1,bool IsExact,const SimplifyQuery & Q) simplifyAShrInst() argument 1703 simplifyAndOfICmpsWithAdd(ICmpInst * Op0,ICmpInst * Op1,const InstrInfoQuery & IIQ) simplifyAndOfICmpsWithAdd() argument 1771 simplifyAndOfICmps(ICmpInst * Op0,ICmpInst * Op1,const SimplifyQuery & Q) simplifyAndOfICmps() argument 1794 simplifyOrOfICmpsWithAdd(ICmpInst * Op0,ICmpInst * Op1,const InstrInfoQuery & IIQ) simplifyOrOfICmpsWithAdd() argument 1841 simplifyOrOfICmps(ICmpInst * Op0,ICmpInst * Op1,const SimplifyQuery & Q) simplifyOrOfICmps() argument 1908 simplifyAndOrOfCmps(const SimplifyQuery & Q,Value * Op0,Value * Op1,bool IsAnd) simplifyAndOrOfCmps() argument 1950 simplifyAndOrWithICmpEq(unsigned Opcode,Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAndOrWithICmpEq() argument 1998 simplifyLogicOfAddSub(Value * Op0,Value * Op1,Instruction::BinaryOps Opcode) simplifyLogicOfAddSub() argument 2021 simplifyAndCommutative(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAndCommutative() argument 2074 simplifyAndInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyAndInst() argument 2253 simplifyAndInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyAndInst() argument 2349 simplifyOrInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyOrInst() argument 2527 simplifyOrInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyOrInst() argument 2533 simplifyXorInst(Value * Op0,Value * Op1,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyXorInst() argument 2604 simplifyXorInst(Value * Op0,Value * Op1,const SimplifyQuery & Q) simplifyXorInst() argument 5345 foldIdentityShuffles(int DestElt,Value * Op0,Value * Op1,int MaskVal,Value * RootVec,unsigned MaxRecurse) foldIdentityShuffles() argument 5390 simplifyShuffleVectorInst(Value * Op0,Value * Op1,ArrayRef<int> Mask,Type * RetTy,const SimplifyQuery & Q,unsigned MaxRecurse) simplifyShuffleVectorInst() argument 5506 simplifyShuffleVectorInst(Value * Op0,Value * Op1,ArrayRef<int> Mask,Type * RetTy,const SimplifyQuery & Q) simplifyShuffleVectorInst() argument 5625 simplifyFAddInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFAddInst() argument 5691 simplifyFSubInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFSubInst() argument 5757 simplifyFMAFMul(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFMAFMul() argument 5806 simplifyFMulInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned MaxRecurse,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFMulInst() argument 5818 simplifyFAddInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFAddInst() argument 5826 simplifyFSubInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFSubInst() argument 5834 simplifyFMulInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFMulInst() argument 5842 simplifyFMAFMul(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFMAFMul() argument 5851 simplifyFDivInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFDivInst() argument 5901 simplifyFDivInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFDivInst() argument 5910 simplifyFRemInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,unsigned,fp::ExceptionBehavior ExBehavior=fp::ebIgnore,RoundingMode Rounding=RoundingMode::NearestTiesToEven) simplifyFRemInst() argument 5939 simplifyFRemInst(Value * Op0,Value * Op1,FastMathFlags FMF,const SimplifyQuery & Q,fp::ExceptionBehavior ExBehavior,RoundingMode Rounding) simplifyFRemInst() argument 6168 simplifyLdexp(Value * Op0,Value * Op1,const SimplifyQuery & Q,bool IsStrict) simplifyLdexp() argument 6336 foldMinMaxSharedOp(Intrinsic::ID IID,Value * Op0,Value * Op1) foldMinMaxSharedOp() argument 6362 foldMinimumMaximumSharedOp(Intrinsic::ID IID,Value * Op0,Value * Op1) foldMinimumMaximumSharedOp() argument 6404 simplifyBinaryIntrinsic(Intrinsic::ID IID,Type * ReturnType,Value * Op0,Value * Op1,const SimplifyQuery & Q,const CallBase * Call) simplifyBinaryIntrinsic() argument 6773 Value *Op0 = Args[0], *Op1 = Args[1], *ShAmtArg = Args[2]; simplifyIntrinsic() local 6818 Value *Op1 = Args[1]; simplifyIntrinsic() local [all...] |
/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGTargetInfo.h | 52 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) EmitTargetCodeForMemcpy() argument 68 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) EmitTargetCodeForMemmove() argument 82 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) EmitTargetCodeForMemset() argument 96 EmitTargetCodeForMemcmp(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,MachinePointerInfo Op1PtrInfo,MachinePointerInfo Op2PtrInfo) EmitTargetCodeForMemcmp() argument 133 EmitTargetCodeForStrcmp(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,MachinePointerInfo Op1PtrInfo,MachinePointerInfo Op2PtrInfo) EmitTargetCodeForStrcmp() argument
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/llvm-project/llvm/unittests/CodeGen/ |
H A D | SelectionDAGPatternMatchTest.cpp | 108 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Float32VT); in TEST_F() local 128 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); TEST_F() local 185 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int64VT); TEST_F() local 252 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); TEST_F() local 301 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT); TEST_F() local 359 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int16VT); TEST_F() local [all...] |
/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ExpandImm.h | 24 uint64_t Op1; member
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/llvm-project/llvm/unittests/Transforms/Vectorize/ |
H A D | VPlanTest.cpp | 928 VPValue *Op1 = Plan.getOrAddLiveIn(ConstantInt::get(Int32, 1)); in TEST() local 865 VPValue Op1; TEST() local 880 VPValue Op1; TEST() local 900 VPValue Op1; TEST() local 956 VPValue Op1; TEST() local 1009 VPValue Op1; TEST() local 1067 VPValue Op1; TEST() local 1084 VPValue Op1; TEST() local 1102 VPValue Op1; TEST() local 1167 VPValue Op1; TEST() local 1190 VPValue Op1; TEST() local 1206 VPValue Op1; TEST() local 1218 VPValue Op1; TEST() local 1228 VPValue Op1; TEST() local 1496 VPInstruction Op1(30, {}); TEST() local [all...] |
/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiMCCodeEmitter.cpp | 189 const MCOperand Op1 = Inst.getOperand(OpNo + 0); getRiMemoryOpValue() local 221 const MCOperand Op1 = Inst.getOperand(OpNo + 0); getRrMemoryOpValue() local 260 const MCOperand Op1 = Inst.getOperand(OpNo + 0); getSplsOpValue() local
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/llvm-project/llvm/lib/MC/MCParser/ |
H A D | MCTargetAsmParser.cpp | 53 bool MCTargetAsmParser::areEqualRegs(const MCParsedAsmOperand &Op1, in areEqualRegs()
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/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineMulDivRem.cpp | 192 simplifyMulInst(Op0, Op1, I.hasNoSignedWrap(), I.hasNoUnsignedWrap(), in visitMul() local 570 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFPSignBitOps() local 628 Value *Op1 = I.getOperand(1); foldPowiReassoc() local 671 Value *Op1 = I.getOperand(1); foldFMulReassoc() local 878 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitFMul() local 1081 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldIDivShl() local 1163 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); commonIDivTransforms() local 1518 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitUDiv() local 1587 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitSDiv() local 1797 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFDivPowDivisor() local 1846 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFDivSqrtDivisor() local 1890 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitFDiv() local 2001 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *X = nullptr; simplifyIRemMulShl() local 2106 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); commonIRemTransforms() local 2171 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitURem() local 2234 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitSRem() local [all...] |
H A D | InstCombineAndOrXor.cpp | 1571 Value *Op0, Value *Op1) { in reassociateFCmps() local 1480 foldLogicOfIsFPClass(BinaryOperator & BO,Value * Op0,Value * Op1) foldLogicOfIsFPClass() argument 1618 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); matchDeMorgansLaws() local 1700 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldCastedBitwiseLogic() local 1707 __anon78e012730a02(Value *Op0, Value *Op1) foldCastedBitwiseLogic() argument 1798 Value *Op1 = I.getOperand(1); foldAndToXor() local 1824 Value *Op1 = I.getOperand(1); foldOrToXor() local 1869 Value *Op0 = And.getOperand(0), *Op1 = And.getOperand(1); narrowMaskedBinOp() local 1913 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldComplexAndOrPatterns() local 2085 Value *Op1 = I.getOperand(1); canonicalizeLogicFirst() local 2297 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitAnd() local 2995 Value *Op0 = Or.getOperand(0), *Op1 = Or.getOperand(1); matchOrConcat() local 3481 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitOr() local 4001 Value *Op1 = I.getOperand(1); foldXorToXor() local 4260 Value *Op0 = Xor.getOperand(0), *Op1 = Xor.getOperand(1); canonicalizeAbs() local 4308 Value *Op0, *Op1; sinkNotIntoLogicalOp() local 4354 Value *Op0, *Op1; sinkNotIntoOtherHandOfLogicalOp() local 4616 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitXor() local [all...] |
H A D | InstCombineCompares.cpp | 1297 Value *Op0 = Cmp.getOperand(0), *Op1 = Cmp.getOperand(1); foldICmpWithConstant() local 2970 createLogicFromTable(const std::bitset<4> & Table,Value * Op0,Value * Op1,IRBuilderBase & Builder,bool HasOneUse) createLogicFromTable() argument 3026 Value *Op0, *Op1; foldICmpAddConstant() local 3266 Value *Op1 = Cmp.getOperand(1); foldICmpBitCast() local 3722 Value *Op1 = Cmp.getOperand(1); foldICmpIntrinsicWithIntrinsic() local 3874 Value *Op1 = II->getOperand(1); foldICmpUSubSatOrUAddSatWithConstant() local 4092 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpInstWithConstantNotInt() local 4141 Value *Op1 = SimplifyOp(SI->getOperand(1), true); foldSelectICmp() local 4290 foldICmpWithLowBitMaskedVal(ICmpInst::Predicate Pred,Value * Op0,Value * Op1,const SimplifyQuery & Q,InstCombiner & IC) foldICmpWithLowBitMaskedVal() argument 4771 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *A; foldICmpAndXX() local 4833 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *A; foldICmpOrXX() local 4868 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1), *A; foldICmpXorXX() local 4896 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpBinOp() local 5518 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpPow2Test() local 5572 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpEquality() local 5822 Value *Op0 = ICmp.getOperand(0), *Op1 = ICmp.getOperand(1); foldICmpWithTrunc() local 6435 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpUsingKnownBits() local 6863 Value *Op1 = I.getOperand(1); canonicalizeCmpWithConstant() local 7094 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldICmpOfUAddOv() local 7188 foldICmpCommutative(ICmpInst::Predicate Pred,Value * Op0,Value * Op1,ICmpInst & CxtI) foldICmpCommutative() argument 7302 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitICmpInst() local 7988 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); foldFCmpFNegCommonOp() local 8064 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); visitFCmpInst() local [all...] |
/llvm-project/llvm/lib/CodeGen/ |
H A D | DFAPacketizer.cpp | 252 bool VLIWPacketizerList::alias(const MachineMemOperand &Op1, in alias() 278 for (const MachineMemOperand *Op1 : MI1.memoperands()) in alias() local
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H A D | ExpandVectorPredication.cpp | 262 Value *Op1 = VPI.getOperand(1); expandPredicationInBinaryOperator() local 298 Value *Op1 = VPI.getOperand(1); expandPredicationToIntCall() local 336 Value *Op1 = VPI.getOperand(1); expandPredicationToFPCall() local 348 Value *Op1 = VPI.getOperand(1); expandPredicationToFPCall() local 643 Value *Op1 = VPI.getOperand(1); expandPredicationInComparison() local
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/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 532 buildPtrMask(const DstOp & Res,const SrcOp & Op0,const SrcOp & Op1) buildPtrMask() argument 593 buildUAddo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildUAddo() argument 599 buildUSubo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildUSubo() argument 605 buildSAddo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildSAddo() argument 611 buildSSubo(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1) buildSSubo() argument 630 buildUAdde(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildUAdde() argument 638 buildUSube(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildUSube() argument 646 buildSAdde(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildSAdde() argument 654 buildSSube(const DstOp & Res,const DstOp & CarryOut,const SrcOp & Op0,const SrcOp & Op1,const SrcOp & CarryIn) buildSSube() argument [all...] |
/llvm-project/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 158 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; parseGenericRegister() local 173 uint32_t Op1 = (Bits >> 11) & 0x7; genericRegisterString() local
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/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiMemAluCombiner.cpp | 169 bool isSameOperand(const MachineOperand &Op1, const MachineOperand &Op2) { in isSameOperand() 292 MachineOperand &Op1 = AluIter->getOperand(1); in isSuitableAluInstr() local
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonSplitDouble.cpp | 343 const MachineOperand &Op1 = MI->getOperand(1); in profit() local 698 MachineOperand &Op1 = MI->getOperand(1); in splitImmediate() local 725 MachineOperand &Op1 = MI->getOperand(1); in splitCombine() local 755 MachineOperand &Op1 = MI->getOperand(1); splitExt() local 777 MachineOperand &Op1 = MI->getOperand(1); splitShift() local 901 MachineOperand &Op1 = MI->getOperand(1); splitAslOr() local [all...] |
/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyTargetTransformInfo.cpp | 86 Opcode, Val, CostKind, Index, Op0, Op1); in getVectorInstrCost() argument
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H A D | WebAssemblySelectionDAGInfo.cpp | 37 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,Align Alignment,bool IsVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemmove() argument
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H A D | WebAssemblyPeephole.cpp | 133 MachineOperand &Op1 = MI.getOperand(1); in runOnMachineFunction() local
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/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFMCCodeEmitter.cpp | 162 assert(Op1.isReg() && "First operand is not register."); in getMemoryOpValue() local
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/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86RegisterBankInfo.cpp | 330 auto &Op1 = MI.getOperand(1); getInstrMapping() local 359 auto &Op1 = MI.getOperand(1); getInstrMapping() local
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600TargetTransformInfo.cpp | 113 Value *Op1) { in getVectorInstrCost()
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/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYISelDAGToDAG.cpp | 308 auto Op1 = N->getOperand(1); in selectAddCarry() local 351 auto Op1 = N->getOperand(1); in selectSubCarry() local
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