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Searched defs:Offset1 (Results 1 – 25 of 28) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMHazardRecognizer.cpp205 int64_t Offset1 = 0; in getHazardType() local
H A DARMBaseInstrInfo.cpp1948 areLoadsFromSameBasePtr(SDNode * Load1,SDNode * Load2,int64_t & Offset1,int64_t & Offset2) const areLoadsFromSameBasePtr() argument
2015 shouldScheduleLoadsNear(SDNode * Load1,SDNode * Load2,int64_t Offset1,int64_t Offset2,unsigned NumLoads) const shouldScheduleLoadsNear() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp673 APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0); foldLoadsRecursive() local
808 APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0); foldConsecutiveLoads() local
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1409 areLoadsFromSameBasePtr(SDNode * Load1,SDNode * Load2,int64_t & Offset1,int64_t & Offset2) areLoadsFromSameBasePtr() argument
1423 shouldScheduleLoadsNear(SDNode * Load1,SDNode * Load2,int64_t Offset1,int64_t Offset2,unsigned NumLoads) shouldScheduleLoadsNear() argument
1526 shouldClusterMemOps(ArrayRef<const MachineOperand * > BaseOps1,int64_t Offset1,bool OffsetIsScalable1,ArrayRef<const MachineOperand * > BaseOps2,int64_t Offset2,bool OffsetIsScalable2,unsigned ClusterSize,unsigned NumBytes) shouldClusterMemOps() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp410 int64_t Offset1; apply() local
H A DHexagonISelLoweringHVX.cpp2224 SDValue Offset1 = DAG.getTargetConstant(HwLen, dl, MVT::i32); in LowerHvxMaskedOp() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsSizeReduction.cpp400 int64_t Offset1, Offset2; in ConsecutiveInstr() local
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp246 int64_t Offset1, Offset2; ClusterNeighboringLoads() local
H A DDAGCombiner.cpp18294 const APInt &Offset1 = Offset->getAsAPIntVal(); CombineToPreIndexedLoadStore() local
20569 int64_t Offset1 = LoadNodes[1].OffsetFromBase; tryStoreMergeOfLoads() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DSeparateConstOffsetFromGEP.cpp1318 Value *Offset1 = First->getOperand(1); swapGEPOperand() local
H A DConstraintElimination.cpp650 int64_t Offset1 = ADec.Offset; getConstraint() local
/freebsd-src/contrib/llvm-project/llvm/lib/IR/
H A DValue.cpp1031 APInt Offset1(DL.getIndexTypeSizeInBits(Ptr1->getType()), 0); getPointerOffsetFrom() local
/freebsd-src/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DContainerModeling.cpp959 invalidateIteratorPositions(ProgramStateRef State,SymbolRef Offset1,BinaryOperator::Opcode Opc1,SymbolRef Offset2,BinaryOperator::Opcode Opc2) invalidateIteratorPositions() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp400 unsigned Offset1 = Offset1Op->getImm() & 0xff; getMemOperandsWithOffsetWidth() local
551 shouldClusterMemOps(ArrayRef<const MachineOperand * > BaseOps1,int64_t Offset1,bool OffsetIsScalable1,ArrayRef<const MachineOperand * > BaseOps2,int64_t Offset2,bool OffsetIsScalable2,unsigned ClusterSize,unsigned NumBytes) const shouldClusterMemOps() argument
596 shouldScheduleLoadsNear(SDNode * Load0,SDNode * Load1,int64_t Offset0,int64_t Offset1,unsigned NumLoads) const shouldScheduleLoadsNear() argument
3649 int64_t Offset0, Offset1; checkInstOffsetsDoNotOverlap() local
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H A DAMDGPUISelDAGToDAG.cpp1130 isDSOffset2Legal(SDValue Base,unsigned Offset0,unsigned Offset1,unsigned Size) const isDSOffset2Legal() argument
1235 SelectDSReadWrite2(SDValue Addr,SDValue & Base,SDValue & Offset0,SDValue & Offset1,unsigned Size) const SelectDSReadWrite2() argument
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H A DSILoadStoreOptimizer.cpp2098 uint64_t Offset1 = Src1->getImm(); processBaseWithConstOffset() local
H A DAMDGPUInstructionSelector.cpp1611 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (Instruction << 4); selectDSOrderedIntrinsic() local
4740 isDSOffset2Legal(Register Base,int64_t Offset0,int64_t Offset1,unsigned Size) const isDSOffset2Legal() argument
H A DSIISelLowering.cpp8438 unsigned Offset1 = WaveRelease | (WaveDone << 1) | (Instruction << 4); LowerINTRINSIC_W_CHAIN() local
/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/
H A DConstantFolding.cpp1267 APInt Offset1(IndexWidth, 0); ConstantFoldCompareInstOperands() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp2275 shouldClusterMemOps(ArrayRef<const MachineOperand * > BaseOps1,int64_t Offset1,bool OffsetIsScalable1,ArrayRef<const MachineOperand * > BaseOps2,int64_t Offset2,bool OffsetIsScalable2,unsigned ClusterSize,unsigned NumBytes) const shouldClusterMemOps() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp8574 areLoadsFromSameBasePtr(SDNode * Load1,SDNode * Load2,int64_t & Offset1,int64_t & Offset2) const areLoadsFromSameBasePtr() argument
8700 shouldScheduleLoadsNear(SDNode * Load1,SDNode * Load2,int64_t Offset1,int64_t Offset2,unsigned NumLoads) const shouldScheduleLoadsNear() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp4224 shouldClusterFI(const MachineFrameInfo & MFI,int FI1,int64_t Offset1,unsigned Opcode1,int FI2,int64_t Offset2,unsigned Opcode2) shouldClusterFI() argument
4292 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); shouldClusterMemOps() local
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp814 int64_t Offset1, Offset2; addLoopCarriedDependences() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2914 int64_t Offset1 = 0, Offset2 = 0; shouldClusterMemOps() local
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp1238 const APInt *Offset1 = nullptr, *Offset2 = nullptr; foldAndOrOfICmpsUsingRanges() local

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