| /llvm-project/llvm/unittests/IR/ |
| H A D | ShuffleVectorInstTest.cpp | 113 int NumSubElts, Index; in TEST() local
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 135 int NumSubElts = SubVTy->getNumElements(); getExtractSubvectorOverhead() local
163 int NumSubElts = SubVTy->getNumElements(); getInsertSubvectorOverhead() local
995 int NumSubElts; improveShuffleKindFromMask() local
1419 unsigned NumSubElts = NumElts / Factor; global() variable
[all...] |
| /llvm-project/llvm/lib/IR/ |
| H A D | Instructions.cpp | 2039 isInsertSubvectorMask(ArrayRef<int> Mask,int NumSrcElts,int & NumSubElts,int & Index) isInsertSubvectorMask() argument
2404 matchShuffleAsBitRotate(ArrayRef<int> Mask,int NumSubElts) matchShuffleAsBitRotate() argument
2427 isBitRotateMask(ArrayRef<int> Mask,unsigned EltSizeInBits,unsigned MinSubElts,unsigned MaxSubElts,unsigned & NumSubElts,unsigned & RotateAmt) isBitRotateMask() argument
[all...] |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 884 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); SimplifyMultipleUseDemandedBits() local
1261 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); SimplifyDemandedBits() local
1332 unsigned NumSubElts = SubVT.getVectorNumElements(); SimplifyDemandedBits() local
1428 unsigned NumSubElts = SimplifyDemandedBits() local
3265 unsigned NumSubElts = SubVT.getVectorNumElements(); SimplifyDemandedVectorElts() local
3303 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); SimplifyDemandedVectorElts() local
10046 unsigned NumSubElts = SubEC.getKnownMinValue(); clampDynamicVectorIndex() local
[all...] |
| H A D | SelectionDAG.cpp | 3310 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); computeKnownBits() local
4962 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); ComputeNumSignBits() local
12227 __anon38f0167a1c02(SDValue Op, unsigned NumSubElts) matchBinOpReduction() argument
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| H A D | DAGCombiner.cpp | 24743 unsigned NumSubElts = NVT.getVectorMinNumElements(); visitEXTRACT_SUBVECTOR() local
25901 int NumSubElts = SubVT.getVectorNumElements(); visitVECTOR_SHUFFLE() local
26892 int NumSubElts = NumElts * Split; XformToShuffleWithZero() local
[all...] |
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 1574 int NumSubElts = SubLT.second.getVectorNumElements(); getShuffleCost() local
1623 int NumSubElts = SubLT.second.getVectorNumElements(); getShuffleCost() local
[all...] |
| H A D | X86InstCombineIntrinsic.cpp | 266 for (unsigned i = 0, NumSubElts = 64 / BitWidth; i != NumSubElts; ++i) { simplifyX86immShift() local
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| H A D | X86ISelDAGToDAG.cpp | 1080 unsigned NumSubElts = VT.getSizeInBits() / MaxVT.getScalarSizeInBits(); PreprocessISelDAG() local
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| H A D | X86ISelLowering.cpp | 4255 unsigned NumSubElts = OpVT.getVectorNumElements() / NumSubs; SplitOpsAndApply() local
4940 unsigned NumSubElts = SubVecSizeInBits / CstEltSizeInBits; getTargetConstantBitsFromNode() local
5009 unsigned NumSubElts = VT.getVectorNumElements(); getTargetConstantBitsFromNode() local
5735 int NumSubElts = V.getOperand(1).getValueType().getVectorNumElements(); getTargetShuffleAndZeroables() local
5929 unsigned NumSubElts = SubVT.getVectorNumElements(); getFauxShuffleMask() local
6468 unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); getShuffleScalarElt() local
6478 unsigned NumSubElts = SubVT.getVectorNumElements(); getShuffleScalarElt() local
11307 unsigned RotateAmt, NumSubElts; matchShuffleAsBitRotate() local
12567 int NumSubElts = (int)VInner.getSimpleValueType().getVectorNumElements(); lowerShuffleAsBroadcast() local
56862 unsigned NumSubElts = VT.getVectorNumElements(); combineEXTRACT_SUBVECTOR() local
[all...] |
| /llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfoImpl.h | 1350 int NumSubElts, SubIndex; getInstructionCost() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 4265 int NumSubElts = SubLT.second.getVectorNumElements(); getShuffleCost() local
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| H A D | AArch64ISelLowering.cpp | 19361 unsigned NumSubElts = SubVT.getVectorNumElements(); performInsertSubvectorCombine() local
20335 int NumSubElts = NumElts / 4; isLoadOrMultipleLoads() local
20455 unsigned NumSubElts = NumElts / NumSubLoads; performExtBinopLoadFold() local
[all...] |
| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4669 int NumSubElts, Index; lowerVECTOR_SHUFFLEAsVSlideup() local
4922 unsigned NumSubElts; isLegalBitRotate() local
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| /llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 8024 int NumSubElts; getShuffleCost() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15683 unsigned NumSubElts = SubVT.getVectorNumElements(); PerformInsertSubvectorCombine() local
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