| /freebsd-src/contrib/llvm-project/clang/include/clang/Analysis/Analyses/ |
| H A D | ThreadSafetyLogical.h | 27 Not enumerator
86 Not(LExpr *Exp) : LExpr(LExpr::Not), Exp(Exp) {} in Not() function
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| /freebsd-src/contrib/llvm-project/clang/include/clang/Analysis/FlowSensitive/ |
| H A D | Formula.h | 58 Not, /// True if its only operand is false enumerator
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 424 getRegForI1Value(const Value * V,const BasicBlock * BB,bool & Not) getRegForI1Value() argument
912 bool Not; selectSelect() local
1100 bool Not = false; selectFCmp() local
1313 bool Not; selectBr() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CompressInstEmitter.cpp | 692 StringRef Not = Op.first ? "!" : ""; in emitCompressInstEmitter() local
703 StringRef Not = Op.first ? "!" : ""; in emitCompressInstEmitter() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 1626 Value *Not = Builder.CreateXor(A, AllOnes); visitAdd() local
2522 Value *Not = Builder.CreateNot(Op1); visitSub() local
2528 Value *Not = Builder.CreateNot(Op0); visitSub() local
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| H A D | InstCombineAndOrXor.cpp | 3621 Value *Not = Builder.CreateNot(NotOp, NotOp->getName() + ".not"); visitOr() local
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| /freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 433 Not, ///< Bitwise negation. global() enumerator
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanTransforms.cpp | 558 VPInstruction *Not = dyn_cast<VPInstruction>(Term->getOperand(0)); canSimplifyBranchOnCond() local
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| H A D | VPlan.h | 1134 Not, global() enumerator
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 582 auto Not = [&](auto V) -> std::pair<Value *, uint8_t> { simplifyTernarylogic() local
[all...] |
| H A D | X86ISelLowering.cpp | 4983 if (SDValue Not = IsNOT(V.getOperand(0), DAG)) { IsNOT() local
30201 bool Not = false; FindSingleBitChange() local
47827 if (SDValue Not = IsNOT(N0, DAG)) { combineAndNotIntoANDNP() local
47830 } else if (SDValue Not = IsNOT(N1, DAG)) { combineAndNotIntoANDNP() local
47875 if (SDValue Not = IsNOT(Src, DAG)) { combineAndShuffleNot() local
47891 if (SDValue Not = GetNot(N0)) { combineAndShuffleNot() local
47894 } else if (SDValue Not = GetNot(N1)) { combineAndShuffleNot() local
52210 if (SDValue Not = IsNOT(N0, DAG)) combineAndnp() local
52216 if (SDValue Not = IsNOT(N1, DAG)) combineAndnp() local
52239 SDValue Not = getConstVector(EltBits0, VT, DAG, DL); combineAndnp() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 2599 SDValue Not = lowerShiftLeftParts() local
2638 SDValue Not = lowerShiftRightParts() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1616 SDValue Not = TLO.DAG.getNOT(dl, Op0.getOperand(0), VT); SimplifyDemandedBits() local
5207 SDValue Not = DAG.getNOT(dl, N1, OpVT); SimplifySetCC() local
8935 SDValue Not = DAG.getNode(ISD::VP_XOR, dl, VT, Op, expandVPCTTZ() local
10066 SDValue Not = DAG.getNOT(dl, OverflowMask, VT); expandAddSubSat() local
[all...] |
| H A D | DAGCombiner.cpp | 2679 SDValue Not = ShiftOp.getOperand(0); foldAddSubOfSignBit() local
2777 SDValue Not = DAG.getNOT(DL, X, X.getValueType()); visitADDLike() local
2940 SDValue Not = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(0), visitADDLike() local
3166 SDValue Not = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(0), visitADDLikeCommutative() local
11516 SDValue Not = DAG.getNOT(DL, Sra, VT); foldVSelectToSignBitSplatMask() local
[all...] |
| H A D | SelectionDAG.cpp | 5389 __anonf8222bf90b02(SDValue Not, SDValue Mask, SDValue Other) haveNoCommonBitsSetCommutative() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 7581 MachineInstr *Not = lowerScalarXnor() local
7613 MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest) splitScalarNotBinop() local
7638 MachineInstr &Not = *BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), Interm) splitScalarBinOpN2() local
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| H A D | AMDGPUISelLowering.cpp | 2392 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); LowerFTRUNC() local
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| H A D | AMDGPULegalizerInfo.cpp | 2446 auto Not = B.buildNot(S64, Shr); legalizeIntrinsicTrunc() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 2606 MachineSDNode *Not = selectShiftMask() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3395 auto Not = Builder.buildNot(MRI.getType(X), X); applyXorOfAndWithSameReg() local
6466 Register Not = MRI.createGenericVirtualRegister(CondTy); tryFoldSelectOfConstants() local
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| H A D | LegalizerHelper.cpp | 7551 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; lowerAddSubSatToMinMax() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 3662 MachineSDNode *Not = tryShiftAmountMod() local
|