| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 147 BinaryOperator *NewShift = BinaryOperator::Create(ShiftOpcode, X, NewShAmt); in reassociateShiftAmtsOfTwoSameDirectionShifts() local
334 auto *NewShift = BinaryOperator::Create(OuterShift->getOpcode(), X, in dropRedundantMaskingOfLeftShiftInput() local
434 if (auto *NewShift = cast_or_null<Instruction>( commonShiftTransforms() local
840 Value *NewShift = FoldShiftByConstant() local
869 Value *NewShift = Builder.CreateBinOp(I.getOpcode(), FalseVal, C1); FoldShiftByConstant() local
886 Value *NewShift = Builder.CreateBinOp(I.getOpcode(), TrueVal, C1); FoldShiftByConstant() local
1129 Value *NewShift = Builder.CreateBinOp(ShiftOpc, X, ShiftDiffC, "sh.diff"); visitShl() local
1200 Value *NewShift = Builder.CreateShl(X, Op1); visitShl() local
1551 Value *NewShift = Builder.CreateLShr(NarrowSwap, ShAmtC - WidthDiff); visitLShr() local
[all...] |
| H A D | InstCombineCompares.cpp | 1730 Value *NewShift = foldICmpAndShift() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4055 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt); performShlCombine() local
4079 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, performSraCombine() local
4089 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, performSraCombine() local
4139 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst); performSrlCombine() local
|
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2625 SDValue NewShift = DAG.getNode(IsAdd ? ISD::SRA : ISD::SRL, DL, VT, foldAddSubOfSignBit() local
6912 SDValue NewShift = DAG.getNode(ShiftOpcode, DL, VT, LogicX, Y); foldLogicOfShifts() local
9764 SDValue NewShift = DAG.getNode(N->getOpcode(), DL, VT, LHS.getOperand(0), visitShiftByConstant() local
10603 SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT, visitSRL() local
10612 SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT, visitSRL() local
[all...] |
| H A D | TargetLowering.cpp | 1885 SDValue NewShift = TLO.DAG.getNode(ISD::SHL, dl, HalfVT, NewOp, SimplifyDemandedBits() local
1982 SDValue NewShift = SimplifyDemandedBits() local
|
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2134 SDValue NewShift = DAG.getNode(ISD::SHL, DL, VT, NewAnd, Shift.getOperand(1)); foldMaskedShiftToScaledMask() local
|
| H A D | X86ISelLowering.cpp | 42707 SDValue NewShift = TLO.DAG.getNode( SimplifyDemandedBitsForTargetNode() local
48169 SDValue NewShift = DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), N1); combineShiftRightLogical() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2709 Register NewShift = applyCombineTruncOfShift() local
|
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17498 SDValue NewShift = DAG.getNode(NewOpcode, DL, N->getVTList(), Op0, Op1, PerformLongShiftCombine() local
|