| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 89 MachineInstr *Mov = TII->buildMovInstr(&MBB, I, in runOnMachineFunction() local
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| H A D | SIPreEmitPeephole.cpp | 94 const unsigned Mov = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; optimizeVccBranch() local
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| H A D | R600InstrInfo.cpp | 1111 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, buildIndirectWrite() local
1143 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, buildIndirectRead() local
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| H A D | SILoadStoreOptimizer.cpp | 1894 MachineInstr *Mov = createRegOrImm() local
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| H A D | AMDGPUISelDAGToDAG.cpp | 836 SDNode *Mov = CurDAG->getMachineNode( getMaterializedScalarImm32() local
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| H A D | AMDGPUInstructionSelector.cpp | 1492 unsigned Mov = DstRB->getID() == AMDGPU::SGPRRegBankID ? selectGroupStaticSize() local
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| H A D | SIISelLowering.cpp | 6989 SDNode *Mov = DAG.getMachineNode(AMDGPU::S_MOV_B64, DL, MVT::i64, getSegmentAperture() local
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| /llvm-project/llvm/unittests/tools/llvm-exegesis/X86/ |
| H A D | SnippetGeneratorTest.cpp | 530 InstructionTemplate Mov = Generator.getInstructionTemplate(X86::MOV64ri); in TEST_F() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5190 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val); tryAdvSIMDModImm8() local
5222 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val).addImm(Shift); tryAdvSIMDModImm16() local
5258 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val).addImm(Shift); tryAdvSIMDModImm32() local
5278 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val); tryAdvSIMDModImm64() local
5310 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val).addImm(Shift); tryAdvSIMDModImm321s() local
5339 auto Mov = Builder.buildInstr(Op, {Dst}, {}).addImm(Val); tryAdvSIMDModImmFP() local
5535 auto Mov = emitConstantVector() local
5542 auto Mov = emitConstantVector() local
[all...] |
| /llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 3830 SDNode *Mov = SelectV2I64toI128() local
3861 SDNode *Mov = CurDAG->getMachineNode( SelectI128toV2I64() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1995 SDNode *Mov = CurDAG->getMachineNode(Op, DL, {MVT::Untyped, MVT::Other}, Ops); SelectMultiVectorMove() local
2031 SDNode *Mov = CurDAG->getMachineNode(Op, DL, {MVT::Untyped, MVT::Other}, Ops); SelectMultiVectorMoveZ() local
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| H A D | AArch64ISelLowering.cpp | 13220 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, tryAdvSIMDModImm64() local
13263 SDValue Mov; tryAdvSIMDModImm32() local
13308 SDValue Mov; tryAdvSIMDModImm16() local
13348 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, tryAdvSIMDModImm321s() local
13370 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, tryAdvSIMDModImm8() local
13401 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, tryAdvSIMDModImmFP() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 1020 MachineInstrBuilder Mov; in copyPhysReg() local
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8430 SDValue Mov = DAG.getNode(PPCISD::MFVSR, dl, Op.getValueType(), Conv); LowerFP_TO_INTDirectMove() local
8695 SDValue Mov = DAG.getNode(MovOpc, dl, MVT::f64, Src); LowerINT_TO_FPDirectMove() local
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