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Searched defs:LegalOperations (Results 1 – 5 of 5) sorted by relevance

/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.h58 bool LegalOperations) const override { in canCombineTruncStore()
H A DAMDGPUISelLowering.cpp915 getNegatedExpression(SDValue Op,SelectionDAG & DAG,bool LegalOperations,bool ForCodeSize,NegatibleCost & Cost,unsigned Depth) const getNegatedExpression() argument
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp162 bool LegalOperations = false; global() member in __anon791abb430111::DAGCombiner
3801 tryFoldToZero(const SDLoc & DL,const TargetLowering & TLI,EVT VT,SelectionDAG & DAG,bool LegalOperations) tryFoldToZero() argument
13222 tryToFoldExtOfExtload(SelectionDAG & DAG,DAGCombiner & Combiner,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType) tryToFoldExtOfExtload() argument
13254 tryToFoldExtOfLoad(SelectionDAG & DAG,DAGCombiner & Combiner,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType,ISD::NodeType ExtOpc,bool NonNegZExt=false) tryToFoldExtOfLoad() argument
13315 tryToFoldExtOfMaskedLoad(SelectionDAG & DAG,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType,ISD::NodeType ExtOpc) tryToFoldExtOfMaskedLoad() argument
13373 foldExtendedSignBitTest(SDNode * N,SelectionDAG & DAG,bool LegalOperations) foldExtendedSignBitTest() argument
14838 foldExtendVectorInregToExtendOfSubvector(SDNode * N,const SDLoc & DL,const TargetLowering & TLI,SelectionDAG & DAG,bool LegalOperations) foldExtendVectorInregToExtendOfSubvector() argument
22298 scalarizeExtractedBinop(SDNode * ExtElt,SelectionDAG & DAG,const SDLoc & DL,bool LegalOperations) scalarizeExtractedBinop() argument
24017 combineConcatVectorOfShuffleAndItsOperands(SDNode * N,SelectionDAG & DAG,const TargetLowering & TLI,bool LegalTypes,bool LegalOperations) combineConcatVectorOfShuffleAndItsOperands() argument
24325 narrowInsertExtractVectorBinOp(SDNode * Extract,SelectionDAG & DAG,bool LegalOperations) narrowInsertExtractVectorBinOp() argument
24361 narrowExtractedVectorBinOp(SDNode * Extract,SelectionDAG & DAG,bool LegalOperations) narrowExtractedVectorBinOp() argument
24560 foldExtractSubvectorFromShuffleVector(SDNode * N,SelectionDAG & DAG,const TargetLowering & TLI,bool LegalOperations) foldExtractSubvectorFromShuffleVector() argument
25129 canCombineShuffleToExtendVectorInreg(unsigned Opcode,EVT VT,std::function<bool (unsigned)> Match,SelectionDAG & DAG,const TargetLowering & TLI,bool LegalTypes,bool LegalOperations) canCombineShuffleToExtendVectorInreg() argument
25167 combineShuffleToAnyExtendVectorInreg(ShuffleVectorSDNode * SVN,SelectionDAG & DAG,const TargetLowering & TLI,bool LegalOperations) combineShuffleToAnyExtendVectorInreg() argument
25205 combineShuffleToZeroExtendVectorInReg(ShuffleVectorSDNode * SVN,SelectionDAG & DAG,const TargetLowering & TLI,bool LegalOperations) combineShuffleToZeroExtendVectorInReg() argument
25492 combineShuffleOfBitcast(ShuffleVectorSDNode * SVN,SelectionDAG & DAG,const TargetLowering & TLI,bool LegalOperations) combineShuffleOfBitcast() argument
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/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3943 bool LegalOperations() const { return LegalOps; } LegalOperations() function
/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp52727 bool LegalOperations = !DCI.isBeforeLegalizeOps(); combineFneg() local
52736 getNegatedExpression(SDValue Op,SelectionDAG & DAG,bool LegalOperations,bool ForCodeSize,NegatibleCost & Cost,unsigned Depth) const getNegatedExpression() argument
53909 bool LegalOperations = !DCI.isBeforeLegalizeOps(); combineFMA() local
53970 bool LegalOperations = !DCI.isBeforeLegalizeOps(); combineFMADDSUB() local
[all...]