Lines Matching defs:LegalOperations
165 bool LegalOperations = false;
853 return TLI.isOperationLegalOrCustom(Opcode, VT, LegalOperations);
1395 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations);
1414 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations);
1514 if (!LegalOperations)
1582 if (!LegalOperations)
1631 if (!LegalOperations)
1659 if (!LegalOperations)
1744 LegalOperations = Level >= AfterLegalizeVectorOps;
2603 if ((!LegalOperations || hasOperation(ISD::AVGCEILU, VT)) &&
2608 if ((!LegalOperations || hasOperation(ISD::AVGCEILS, VT)) &&
2725 if ((!LegalOperations ||
2966 if ((!LegalOperations || hasOperation(ISD::AVGFLOORU, VT)) &&
2971 if ((!LegalOperations || hasOperation(ISD::AVGFLOORS, VT)) &&
3000 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) &&
3413 if (!LegalOperations ||
3702 if (!LegalOperations ||
3748 !(!LegalOperations || hasOperation(ISD::USUBSAT, DstVT)))
3868 SelectionDAG &DAG, bool LegalOperations) {
3871 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT))
3895 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations);
3928 if (!LegalOperations || TLI.isOperationLegal(NewSh, VT))
4131 if ((!LegalOperations || hasOperation(ISD::ABS, VT)) &&
4138 if (!LegalOperations && TLI.isOffsetFoldingLegal(GA)) {
4171 if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) {
4219 if ((!LegalOperations || hasOperation(ISD::ABDS, VT)) &&
4231 if ((!LegalOperations || hasOperation(ISD::ABDU, VT)) &&
4375 if (!LegalOperations ||
4390 if (!LegalOperations ||
4508 if (!LegalOperations || TLI.isOperationLegalOrCustom(LoHiOpc, VT)) {
4626 if (!UseVP && (!LegalOperations || hasOperation(ISD::ABS, VT)) &&
4650 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::AND, VT)) &&
5371 (!LegalOperations || hasOperation(ISD::AVGCEILU, VT))) {
5438 (!LegalOperations || hasOperation(ISD::ABS, VT)))
5460 if (!HiExists && (!LegalOperations ||
5468 if (!LoExists && (!LegalOperations ||
5484 (!LegalOperations ||
5494 (!LegalOperations ||
5936 if ((VT.isVector() || LegalOperations) &&
5962 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT))
6058 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations);
6071 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations);
6103 if (LegalOperations || VT.getScalarType() != MVT::i1)
6220 (!LegalOperations ||
6573 (!LegalOperations ||
6589 if (LegalOperations &&
6652 if (LegalOperations &&
6680 if (LegalOperations &&
7340 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) {
7465 ((!LegalOperations && LN0->isSimple()) ||
7520 if (LegalOperations || VT.isVector())
7530 if (!LegalOperations)
7799 if (!LegalOperations)
7865 if (!LegalOperations && (N0.isUndef() || N1.isUndef()))
8175 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) &&
8182 if (LegalOperations || VT.isVector())
8588 if (LegalOperations && !HasROTL && !HasROTR && !HasFSHL && !HasFSHR)
8739 bool UseROTL = !LegalOperations || HasROTL;
8743 bool UseFSHL = !LegalOperations || HasFSHL;
9061 if (LegalOperations || OptLevel == CodeGenOptLevel::None)
9389 if (LegalOperations &&
9421 if (NeedsBswap && (LegalOperations || NeedsZext) &&
9427 if (NeedsBswap && NeedsZext && LegalOperations &&
9610 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) &&
9616 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) &&
9628 if (!LegalOperations ||
9719 if (!LegalOperations || hasOperation(ISD::ABS, VT)) {
9734 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations);
11080 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::SHL, VT)) {
11161 if (!LegalOperations || hasOperation(ABDOpcode, VT)) {
11235 (!LegalOperations || hasOperation(ISD::BSWAP, HalfVT))) {
11283 if ((!LegalOperations || TLI.isOperationLegal(ISD::SHL, VT)) &&
11288 if ((!LegalOperations || TLI.isOperationLegal(ISD::SRL, VT)) &&
11305 if (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ_ZERO_UNDEF, VT))
11334 if (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ_ZERO_UNDEF, VT))
11516 True, DAG, LegalOperations, ForCodeSize);
11532 RHS, DAG, LegalOperations, ForCodeSize);
11618 if (CondVT != MVT::i1 || LegalOperations) {
11648 assert(CondVT == MVT::i1 && !LegalOperations);
11833 if (LegalOperations && !hasOperation(ABDOpc, VT))
11979 (!LegalOperations || TLI.isOperationLegal(ISD::ABDU, VT)))
11987 (!LegalOperations || TLI.isOperationLegal(ISD::ABDU, VT)))
12012 if (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::UADDO, VT) &&
12037 (!LegalOperations &&
12320 MST->getMemoryVT(), LegalOperations)) {
13433 (LegalOperations && !TLI.isOperationLegal(N0.getOpcode(), VT)))
13440 (LegalOperations && !TLI.isOperationLegal(N1.getOpcode(), VT)))
13511 if (LegalOperations || !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT))
13545 bool LegalOperations, SDNode *N,
13556 if ((LegalOperations || !LN0->isSimple() ||
13577 bool LegalOperations, SDNode *N, SDValue N0,
13603 if ((LegalOperations || VT.isFixedLengthVector() ||
13638 bool LegalOperations, SDNode *N, SDValue N0,
13647 if ((LegalOperations || !cast<MaskedLoadSDNode>(N0)->isSimple()) &&
13696 bool LegalOperations) {
13701 if (LegalOperations || SetCC.getOpcode() != ISD::SETCC ||
13749 if (VT.isVector() && !LegalOperations &&
13846 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, N00VT))) {
13937 if (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG,
13950 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0,
13955 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, LegalOperations, N, N0,
13966 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD))
13979 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) {
14017 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations))
14025 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, VT)) &&
14054 (!LegalOperations || (TLI.isOperationLegal(ISD::ZERO_EXTEND, VT) &&
14232 if (!LegalOperations || (TLI.isOperationLegal(ISD::AND, SrcVT) &&
14244 if (!LegalOperations || TLI.isOperationLegal(ISD::AND, VT)) {
14271 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD,
14276 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, LegalOperations, N, N0,
14297 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) {
14353 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD))
14356 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations))
14364 if (!LegalOperations && VT.isVector() &&
14526 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0,
14566 if (!LegalOperations || TLI.isLoadExtLegal(ExtType, VT, MemVT)) {
14586 if (VT.isVector() && !LegalOperations) {
14997 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT)))
15014 (!LegalOperations ||
15024 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT)))
15063 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple() &&
15079 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) &&
15142 (!LegalOperations ||
15156 bool LegalOperations) {
15180 if (LegalOperations && !TLI.isOperationLegal(Opcode, VT))
15206 LegalOperations))
15394 if (LegalTypes && !LegalOperations && VT.isScalarInteger() && VT != MVT::i1 &&
15436 if (!LegalOperations ||
15449 (!LegalOperations || TLI.isOperationLegal(ISD::SHL, VT)) &&
15472 if (N0.getOpcode() == ISD::BUILD_VECTOR && !LegalOperations &&
15489 (!LegalOperations || TLI.isOperationLegal(ISD::SPLAT_VECTOR, VT))) {
15598 (!LegalOperations ||
15640 if (!LegalOperations && N0.hasOneUse() &&
15660 if (((!LegalOperations && N0.getOpcode() == ISD::UADDO_CARRY) ||
15673 if (!LegalOperations && N0.hasOneUse() &&
15716 if ((!LegalOperations || TLI.isOperationLegal(ISD::LOAD, VT)) &&
15767 if (LegalOperations && !TLI.isOperationLegal(FPOpcode, VT))
15814 (!LegalOperations && VT.isInteger() && N0.getValueType().isInteger() &&
15826 if (!LegalOperations ||
15868 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) ||
16312 bool HasFMAD = !UseVP && (LegalOperations && TLI.isFMADLegal(DAG, N));
16316 (!LegalOperations || matcher.isOperationLegalOrCustom(ISD::FMA, VT)) &&
16549 bool HasFMAD = !UseVP && (LegalOperations && TLI.isFMADLegal(DAG, N));
16553 (!LegalOperations || matcher.isOperationLegalOrCustom(ISD::FMA, VT)) &&
16884 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)) &&
16890 (LegalOperations && TLI.isFMADLegal(DAG, N));
17006 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT))
17008 N1, DAG, LegalOperations, ForCodeSize))
17012 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT))
17014 N0, DAG, LegalOperations, ForCodeSize))
17166 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT))
17168 N1, DAG, LegalOperations, ForCodeSize)) {
17174 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT))
17176 N0, DAG, LegalOperations, ForCodeSize)) {
17234 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize))
17236 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
17255 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize))
17439 if (!LegalOperations || TLI.isOperationLegal(ISD::FSUB, VT)) {
17451 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
17455 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
17545 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
17549 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
17603 (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) {
17640 SDValue(N, 0), DAG, LegalOperations, ForCodeSize))
17778 (!LegalOperations ||
17873 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0);
17877 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1);
17997 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT))
18000 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
18156 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT)))
18173 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT)))
18181 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT)))
18204 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT)))
18219 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT)))
18506 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize))
18791 if (!LegalOperations || TLI.isCondCodeLegal(CC, Op0.getSimpleValueType()))
21745 if ((isTypeLegal(MVT::i32) && !LegalOperations && ST->isSimple()) ||
21755 if ((TLI.isTypeLegal(MVT::i64) && !LegalOperations &&
21883 if (((!LegalOperations && ST->isSimple()) ||
22061 ST->getMemoryVT(), LegalOperations)) {
22590 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) {
22686 if (!LegalOperations && llvm::isNullConstant(InVal) &&
23002 if (LegalOperations &&
23201 if (!LegalOperations ||
23267 if (!LegalOperations && !IndexC && VecOp.hasOneUse() &&
23277 if (!LegalOperations || !IndexC)
23624 if (LegalOperations &&
23658 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, InVT1))
23808 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VT))
24083 if (LegalOperations)
24154 (LegalOperations && !TLI.isOperationLegalOrCustom(ISD::BITCAST, OpIntVT)))
24217 (LegalOperations &&
24267 if (!LegalOperations) {
24581 bool LegalOperations) {
24593 (LegalOperations &&
24714 if (!LegalOperations && Scalar.getOpcode() == ISD::SCALAR_TO_VECTOR &&
24821 N, DAG, TLI, LegalTypes, LegalOperations))
24889 bool LegalOperations) {
24903 if (!TLI.isOperationLegalOrCustom(BinOpcode, SubVT, LegalOperations))
24925 bool LegalOperations) {
24929 if (SDValue V = narrowInsertExtractVectorBinOp(Extract, DAG, LegalOperations))
24984 LegalOperations))
25124 bool LegalOperations) {
25146 if (LegalOperations &&
25296 if (!LegalOperations || TLI.isOperationLegal(ISD::SPLAT_VECTOR, NVT))
25320 (!LegalOperations || TLI.isOperationLegal(ISD::BITCAST, NVT))) {
25403 foldExtractSubvectorFromShuffleVector(N, DAG, TLI, LegalOperations))
25456 if (LegalOperations && !TLI.isOperationLegal(ISD::BITCAST, NVT))
25467 if (SDValue NarrowBOp = narrowExtractedVectorBinOp(N, DAG, LegalOperations))
25693 bool LegalOperations) {
25715 (LegalOperations && !TLI.isOperationLegalOrCustom(Opcode, OutVT)))
25731 bool LegalOperations) {
25757 Opcode, VT, isAnyExtend, DAG, TLI, /*LegalTypes=*/true, LegalOperations);
25769 bool LegalOperations) {
25879 LegalOperations);
26055 bool LegalOperations) {
26073 (LegalOperations &&
26327 if ((!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) &&
26422 combineShuffleToAnyExtendVectorInreg(SVN, DAG, TLI, LegalOperations))
26643 if (SDValue V = combineShuffleOfBitcast(SVN, DAG, TLI, LegalOperations))
26910 LegalOperations))
27465 if (LegalOperations)
27704 LegalOperations)) {
28266 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, CmpOpVT))) {
28326 (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ, VT)))
28333 (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ, VT)))
28383 if (SDValue S = TLI.BuildSDIV(N, DAG, LegalOperations, LegalTypes, Built)) {
28424 if (SDValue S = TLI.BuildUDIV(N, DAG, LegalOperations, LegalTypes, Built)) {