| /freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrBuilder.h | 50 bool IsKill, int Offset) { in addRegIndirectWithDisp()
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| H A D | M68kInstrInfo.cpp | 746 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool IsKill,int FrameIndex,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16RegisterInfo.cpp | 123 bool IsKill = false; in eliminateFI() local
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| H A D | MipsSERegisterInfo.cpp | 200 bool IsKill = false; in eliminateFI() local
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| H A D | MipsSEFrameLowering.cpp | 833 bool IsKill = !IsRAAndRetAddrIsTaken; spillCalleeSavedRegisters() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 126 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 275 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy()
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 315 bool IsKill = NewAddrDwords == Info->VAddrDwords; shrinkMIMG() local
538 const bool IsKill = SrcReg->isKill(); shrinkScalarLogicOp() local
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| H A D | SIOptimizeExecMaskingPreRA.cpp | 247 bool IsKill = SelLI->Query(CmpIdx.getRegSlot()).isKill(); in optimizeVcndVcmpPair() local
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| H A D | SIRegisterInfo.cpp | 84 bool IsKill; member
1207 spillVGPRtoAGPR(const GCNSubtarget & ST,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,int Index,unsigned Lane,unsigned ValueReg,bool IsKill) spillVGPRtoAGPR() argument
1322 buildSpillLoadStore(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,unsigned LoadStoreOp,int Index,Register ValueReg,bool IsKill,MCRegister ScratchOffsetReg,int64_t InstOffset,MachineMemOperand * MMO,RegScavenger * RS,LiveRegUnits * LiveUnits) const buildSpillLoadStore() argument
[all...] |
| H A D | SIFrameLowering.cpp | 150 bool IsKill = !MBB.isLiveIn(SpillReg); in buildPrologSpill() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | FixupStatepointCallerSaved.cpp | 112 bool &IsKill, const TargetInstrInfo &TII, in performCopyPropagation() argument
418 bool IsKill = true; in spillRegisters() local
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| H A D | ScheduleDAGInstrs.cpp | 411 bool IsKill = MO.getSubReg() == 0 || MO.isUndef(); addVRegDefDeps() local
1116 bool IsKill = LiveRegs.available(MRI, Reg); toggleKills() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo.cpp | 393 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.cpp | 112 bool IsKill, int FI, const TargetRegisterClass *RC, in storeRegToStackSlot() argument
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| H A D | LoongArchFrameLowering.cpp | 464 bool IsKill = spillCalleeSavedRegisters() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.cpp | 295 bool IsKill, int FrameIndex, const TargetRegisterClass *RC, in storeRegToStackSlot() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 1419 bool IsKill = !HRI.isEHReturnCalleeSaveReg(Reg); insertCSRSpillsInBlock() local
1750 bool IsKill = MI->getOperand(2).isKill(); expandStoreInt() local
1813 bool IsKill = MI->getOperand(2).isKill(); expandStoreVecPred() local
1902 bool IsKill = MI->getOperand(2).isKill(); expandStoreVec2() local
1989 bool IsKill = MI->getOperand(2).isKill(); expandStoreVec() local
[all...] |
| H A D | HexagonBlockRanges.cpp | 325 bool IsKill = Op.isKill(); in computeInitialLiveRanges() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 751 bool IsKill = I.getOperand(1).isKill(); in select() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 51 Register SourceRegister, bool IsKill, int FrameIndex, in storeRegToStackSlot() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | BasicBlockUtils.cpp | 555 bool IsKill = DPV.isKillLocation() && IsDbgValueKind; DPValuesRemoveUndefDbgAssignsFromEntryBlock() local
658 bool IsKill = DVI->isKillLocation() && IsDbgValueKind; removeUndefDbgAssignsFromEntryBlock() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 872 bool IsKill = MO.isKill(); MergeOpsUpdate() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 598 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool IsKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1241 bool IsKill = MI.getOperand(1).isKill(); convertToThreeAddressWithLEA() local
10698 bool IsKill = Root.getOperand(1).isKill(); genAlternativeDpCodeSequence() local
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