/llvm-project/llvm/lib/Transforms/ObjCARC/ |
H A D | ARCRuntimeEntryPoints.h | 138 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint() argument
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/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonOptimizeSZextends.cpp | 56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument
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H A D | HexagonISelLowering.cpp | 3871 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked emitLoadLinked() local 3892 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked emitStoreConditional() local
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H A D | HexagonVectorCombine.cpp | 2569 Intrinsic::ID IntID, Type *RetTy, in createHvxIntrinsic() argument
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/llvm-project/clang/lib/CodeGen/ |
H A D | CGObjC.cpp | 2158 getARCIntrinsic(llvm::Intrinsic::ID IntID,CodeGenModule & CGM) getARCIntrinsic() argument 2170 emitARCValueOperation(CodeGenFunction & CGF,llvm::Value * value,llvm::Type * returnType,llvm::Function * & fn,llvm::Intrinsic::ID IntID,llvm::CallInst::TailCallKind tailKind=llvm::CallInst::TCK_None) emitARCValueOperation() argument 2194 emitARCLoadOperation(CodeGenFunction & CGF,Address addr,llvm::Function * & fn,llvm::Intrinsic::ID IntID) emitARCLoadOperation() argument 2206 emitARCStoreOperation(CodeGenFunction & CGF,Address addr,llvm::Value * value,llvm::Function * & fn,llvm::Intrinsic::ID IntID,bool ignored) emitARCStoreOperation() argument 2229 emitARCCopyOperation(CodeGenFunction & CGF,Address dst,Address src,llvm::Function * & fn,llvm::Intrinsic::ID IntID) emitARCCopyOperation() argument [all...] |
H A D | CGBuiltin.cpp | 8292 packTBLDVectorList(CodeGenFunction & CGF,ArrayRef<Value * > Ops,Value * ExtOp,Value * IndexOp,llvm::Type * ResTy,unsigned IntID,const char * Name) packTBLDVectorList() argument 9722 unsigned IntID; EmitSVEPredicateCast() local 9748 EmitSVEGatherLoad(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEGatherLoad() argument 9802 EmitSVEScatterStore(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEScatterStore() argument 9859 EmitSVEGatherPrefetch(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEGatherPrefetch() argument 9892 EmitSVEStructLoad(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEStructLoad() argument 9940 EmitSVEStructStore(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEStructStore() argument 10129 EmitSMELd1St1(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMELd1St1() argument 10159 EmitSMEReadWrite(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMEReadWrite() argument 10171 EmitSMEZero(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMEZero() argument 10181 EmitSMELdrStr(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMELdrStr() argument 21546 __anon14b925b21902(unsigned IntID, bool IsLoad) EmitHexagonBuiltinExpr() argument 21580 __anon14b925b21a02(unsigned IntID, llvm::Type *DestTy) EmitHexagonBuiltinExpr() argument [all...] |
/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5106 SDValue IntID = lowerVECTOR_SHUFFLE() local 9444 SDValue IntID = DAG.getTargetConstant( LowerINTRINSIC_W_CHAIN() local 9495 SDValue IntID = DAG.getTargetConstant(VlsegInts[NF - 2], DL, XLenVT); LowerINTRINSIC_W_CHAIN() local 9577 SDValue IntID = DAG.getTargetConstant( LowerINTRINSIC_VOID() local 9616 SDValue IntID = DAG.getTargetConstant(VssegInts[NF - 2], DL, XLenVT); LowerINTRINSIC_VOID() local 10778 SDValue IntID = DAG.getTargetConstant( lowerFixedLengthVectorLoadToRVV() local 10839 SDValue IntID = DAG.getTargetConstant( lowerFixedLengthVectorStoreToRVV() local 10886 unsigned IntID = lowerMaskedLoad() local 10964 unsigned IntID = lowerMaskedStore() local 11775 SDValue IntID = DAG.getTargetConstant(IsUnmasked ? Intrinsic::riscv_vlse lowerVPStridedLoad() local 11823 SDValue IntID = DAG.getTargetConstant(IsUnmasked ? Intrinsic::riscv_vsse lowerVPStridedStore() local 11915 unsigned IntID = lowerMaskedGather() local 12013 unsigned IntID = lowerMaskedScatter() local 16190 SDValue IntID = performCONCAT_VECTORSCombine() local 17045 SDValue IntID = PerformDAGCombine() local [all...] |
H A D | RISCVISelDAGToDAG.cpp | 108 SDValue IntID = in PreprocessISelDAG() local
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/llvm-project/clang-tools-extra/clangd/ |
H A D | ClangdLSPServer.cpp | 258 if (auto IntID = ID.getAsInteger()) { onReply() local
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 5335 auto IntID = N->getConstantOperandVal(0); in Select() local
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2360 Intrinsic::ID IntID = computeKnownBitsForTargetNode() local 26113 Intrinsic::ID IntID = ReplaceNodeResults() local 27761 SDValue IntID = HG->getIntID(); LowerVECTOR_HISTOGRAM() local [all...] |
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 20126 Intrinsic::ID IntID = computeKnownBitsForTargetNode() local
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