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Searched defs:Insn (Results 1 – 25 of 44) sorted by relevance

12

/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp142 static DecodeStatus decodeFIOARr(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFIOARr()
155 static DecodeStatus decodeFIORdA(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFIORdA()
168 static DecodeStatus decodeFIOBIT(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFIOBIT()
186 static DecodeStatus decodeFRd(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFRd()
195 static DecodeStatus decodeFLPMX(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFLPMX()
203 static DecodeStatus decodeFFMULRdRr(MCInst &Inst, unsigned Insn, in decodeFFMULRdRr()
217 static DecodeStatus decodeFMOVWRdRr(MCInst &Inst, unsigned Insn, in decodeFMOVWRdRr()
231 static DecodeStatus decodeFWRdK(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeFWRdK()
247 static DecodeStatus decodeFMUL2RdRr(MCInst &Inst, unsigned Insn, in decodeFMUL2RdRr()
261 static DecodeStatus decodeMemri(MCInst &Inst, unsigned Insn, uint64_t Address, in decodeMemri()
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp45 uint64_t &Size, uint16_t &Insn) { in readInstruction16()
57 uint64_t &Size, uint32_t &Insn) { in readInstruction32()
216 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
234 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
249 static DecodeStatus Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, in Decode2OpInstructionFail()
319 static DecodeStatus Decode2RInstruction(MCInst &Inst, unsigned Insn, in Decode2RInstruction()
332 static DecodeStatus Decode2RImmInstruction(MCInst &Inst, unsigned Insn, in Decode2RImmInstruction()
345 static DecodeStatus DecodeR2RInstruction(MCInst &Inst, unsigned Insn, in DecodeR2RInstruction()
358 static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, in Decode2RSrcDstInstruction()
372 static DecodeStatus DecodeRUSInstruction(MCInst &Inst, unsigned Insn, in DecodeRUSInstruction()
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp51 uint64_t &Size, uint32_t &Insn) { in readInstruction32()
60 uint64_t &Size, uint64_t &Insn) { in readInstruction64()
70 uint64_t &Size, uint64_t &Insn) { in readInstruction48()
79 uint64_t &Size, uint32_t &Insn) { in readInstruction16()
156 static unsigned decodeCField(unsigned Insn) { in decodeCField()
160 static unsigned decodeBField(unsigned Insn) { in decodeBField()
165 static unsigned decodeAField(unsigned Insn) { in decodeAField()
169 static DecodeStatus DecodeMEMrs9(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMEMrs9()
229 static DecodeStatus DecodeStLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeStLImmInstruction()
246 static DecodeStatus DecodeLdLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeLdLImmInstruction()
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp76 uint32_t &Insn) { in readInstruction32()
90 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust()
135 uint32_t Insn; in getInstruction() local
174 static DecodeStatus decodeRiMemoryValue(MCInst &Inst, unsigned Insn, in decodeRiMemoryValue()
187 static DecodeStatus decodeRrMemoryValue(MCInst &Inst, unsigned Insn, in decodeRrMemoryValue()
200 static DecodeStatus decodeSplsValue(MCInst &Inst, unsigned Insn, in decodeSplsValue()
221 static DecodeStatus decodeBranch(MCInst &MI, unsigned Insn, uint64_t Address, in decodeBranch()
229 static DecodeStatus decodeShiftImm(MCInst &Inst, unsigned Insn, in decodeShiftImm()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp1008 static DecodeStatus DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address, in DecodeDEXT()
1050 static DecodeStatus DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address, in DecodeDINS()
1092 static DecodeStatus DecodeCRC(MCInst &MI, InsnType Insn, uint64_t Address, in DecodeCRC()
1108 uint64_t &Size, uint32_t &Insn, in readInstruction16()
1128 uint64_t &Size, uint32_t &Insn, in readInstruction32()
1165 uint32_t Insn; in getInstruction() local
1462 static DecodeStatus DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMem()
1482 static DecodeStatus DecodeMemEVA(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMemEVA()
1501 static DecodeStatus DecodeLoadByte15(MCInst &Inst, unsigned Insn, in DecodeLoadByte15()
1518 static DecodeStatus DecodeCacheOp(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeCacheOp()
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp715 checkDecodedInstruction(MCInst & MI,uint64_t & Size,uint64_t Address,raw_ostream & CS,uint32_t Insn,DecodeStatus Result) checkDecodedInstruction() argument
798 uint32_t Insn = llvm::support::endian::read<uint32_t>(Bytes.data(), getARMInstruction() local
1860 DecodeCopMemInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCopMemInstruction() argument
2040 DecodeAddrMode2IdxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode2IdxInstruction() argument
2189 DecodeTSBInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSBInstruction() argument
2202 DecodeAddrMode3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode3Instruction() argument
2394 DecodeRFEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRFEInstruction() argument
2424 DecodeQADDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeQADDInstruction() argument
2449 DecodeMemMultipleWritebackInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMultipleWritebackInstruction() argument
2541 DecodeHINTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeHINTInstruction() argument
2564 DecodeCPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCPSInstruction() argument
2612 DecodeT2CPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2CPSInstruction() argument
2656 DecodeT2HintSpaceInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2HintSpaceInstruction() argument
2680 DecodeT2MOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2MOVTWInstruction() argument
2705 DecodeArmMOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeArmMOVTWInstruction() argument
2733 DecodeSMLAInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSMLAInstruction() argument
2762 DecodeTSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSTInstruction() argument
2784 DecodeSETPANInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSETPANInstruction() argument
2882 DecodeT2BInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BInstruction() argument
2909 DecodeBranchImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchImmInstruction() argument
2957 DecodeVLDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDInstruction() argument
3234 DecodeVLDST1Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST1Instruction() argument
3248 DecodeVLDST2Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST2Instruction() argument
3264 DecodeVLDST3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST3Instruction() argument
3278 DecodeVLDST4Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST4Instruction() argument
3289 DecodeVSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTInstruction() argument
3560 DecodeVLD1DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1DupInstruction() argument
3608 DecodeVLD2DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2DupInstruction() argument
3657 DecodeVLD3DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3DupInstruction() argument
3693 DecodeVLD4DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4DupInstruction() argument
3746 DecodeVMOVModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVModImmInstruction() argument
3792 DecodeMVEModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEModImmInstruction() argument
3821 DecodeMVEVADCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVADCInstruction() argument
3847 DecodeVSHLMaxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSHLMaxInstruction() argument
3895 DecodeTBLInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTBLInstruction() argument
3932 DecodeThumbAddSpecialReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSpecialReg() argument
4065 DecodeT2LoadShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadShift() argument
4149 DecodeT2LoadImm8(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm8() argument
4234 DecodeT2LoadImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm12() argument
4315 DecodeT2LoadT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadT() argument
4354 DecodeT2LoadLabel(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadLabel() argument
4595 DecodeT2LdStPre(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LdStPre() argument
4684 DecodeThumbAddSPImm(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPImm() argument
4696 DecodeThumbAddSPReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPReg() argument
4722 DecodeThumbCPS(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCPS() argument
4734 DecodePostIdxReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePostIdxReg() argument
4748 DecodeMveAddrModeRQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeRQ() argument
4764 DecodeMveAddrModeQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeQ() argument
4828 DecodeThumbTableBranch(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbTableBranch() argument
4846 DecodeThumb2BCCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumb2BCCInstruction() argument
5090 DecodeDoubleRegLoad(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegLoad() argument
5112 DecodeDoubleRegStore(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegStore() argument
5138 DecodeLDRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreImm() argument
5164 DecodeLDRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreReg() argument
5192 DecodeSTRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreImm() argument
5218 DecodeSTRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreReg() argument
5244 DecodeVLD1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1LN() argument
5311 DecodeVST1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST1LN() argument
5376 DecodeVLD2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2LN() argument
5443 DecodeVST2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST2LN() argument
5506 DecodeVLD3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3LN() argument
5576 DecodeVST3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST3LN() argument
5639 DecodeVLD4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4LN() argument
5720 DecodeVST4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST4LN() argument
5792 DecodeVMOVSRR(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVSRR() argument
5818 DecodeVMOVRRS(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVRRS() argument
5844 DecodeIT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeIT() argument
5873 DecodeT2LDRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LDRDPreInstruction() argument
5910 DecodeT2STRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2STRDPreInstruction() argument
5945 DecodeT2Adr(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Adr() argument
5982 DecodeSwap(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSwap() argument
6009 DecodeVCVTD(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTD() argument
6068 DecodeVCVTQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTQ() argument
6128 DecodeNEONComplexLane64Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeNEONComplexLane64Instruction() argument
6325 DecodeLOLoop(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLOLoop() argument
6440 DecodeVSCCLRM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSCCLRM() argument
6792 DecodeMVEVMOVQtoDReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVQtoDReg() argument
6816 DecodeMVEVMOVDRegtoQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVDRegtoQ() argument
6843 DecodeMVEOverlappingLongShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEOverlappingLongShift() argument
6922 DecodeMVEVCVTt1fp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCVTt1fp() argument
6943 DecodeMVEVCMP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCMP() argument
6980 DecodeMveVCTP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveVCTP() argument
6990 DecodeMVEVPNOT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVPNOT() argument
6999 DecodeT2AddSubSPImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddSubSPImm() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp181 static AddrMode DecodeSrcAddrModeI(unsigned Insn) { in DecodeSrcAddrModeI()
187 static AddrMode DecodeSrcAddrModeII(unsigned Insn) { in DecodeSrcAddrModeII()
193 static AddrMode DecodeDstAddrMode(unsigned Insn) { in DecodeDstAddrMode()
233 uint64_t Insn = support::endian::read16le(Bytes.data()); in getInstructionI() local
288 uint64_t Insn = support::endian::read16le(Bytes.data()); in getInstructionII() local
343 uint64_t Insn = support::endian::read16le(Bytes.data()); in getInstructionCJ() local
369 uint64_t Insn = support::endian::read16le(Bytes.data()); in getInstruction() local
/freebsd-src/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DInstructionPrecedenceTracking.h114 bool isDominatedByICFIFromSameBlock(const Instruction *Insn) { in isDominatedByICFIFromSameBlock()
137 bool isDominatedByMemoryWriteFromSameBlock(const Instruction *Insn) { in isDominatedByMemoryWriteFromSameBlock()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ExpandImm.cpp44 SmallVectorImpl<ImmInsnModel> &Insn) { in tryToreplicateChunks() argument
151 SmallVectorImpl<ImmInsnModel> &Insn) { in trySequenceOfOnes() argument
317 SmallVectorImpl<ImmInsnModel> &Insn) { in tryOrrOfLogicalImmediates() argument
342 tryAndOfLogicalImmediates(uint64_t UImm,SmallVectorImpl<ImmInsnModel> & Insn) tryAndOfLogicalImmediates() argument
374 tryEorOfLogicalImmediates(uint64_t Imm,SmallVectorImpl<ImmInsnModel> & Insn) tryEorOfLogicalImmediates() argument
468 expandMOVImmSimple(uint64_t Imm,unsigned BitSize,unsigned OneChunks,unsigned ZeroChunks,SmallVectorImpl<ImmInsnModel> & Insn) expandMOVImmSimple() argument
526 expandMOVImm(uint64_t Imm,unsigned BitSize,SmallVectorImpl<ImmInsnModel> & Insn) expandMOVImm() argument
[all...]
H A DAArch64MIPeepholeOpt.cpp157 SmallVector<AArch64_IMM::ImmInsnModel, 4> Insn; splitBitmaskImm() local
338 SmallVector<AArch64_IMM::ImmInsnModel, 4> Insn; splitAddSubImm() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp379 decodeRVCInstrRdRs1ImmZero(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1ImmZero() argument
391 decodeCSSPushPopchk(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeCSSPushPopchk() argument
401 decodeRVCInstrRdSImm(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdSImm() argument
413 decodeRVCInstrRdRs1UImm(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1UImm() argument
426 decodeRVCInstrRdRs2(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs2() argument
436 decodeRVCInstrRdRs1Rs2(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRVCInstrRdRs1Rs2() argument
447 decodeXTHeadMemPair(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeXTHeadMemPair() argument
481 decodeRegReg(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) decodeRegReg() argument
511 uint32_t Insn; getInstruction() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp126 static DecodeStatus decodeMemoryOpValue(MCInst &Inst, unsigned Insn, in decodeMemoryOpValue()
142 uint64_t &Size, uint64_t &Insn, in readInstruction64()
170 uint64_t Insn, Hi; in getInstruction() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp108 static DecodeStatus DecodeCCRCRegisterClass(MCInst &Inst, APInt &Insn, in DecodeCCRCRegisterClass()
143 auto MakeUp = [&](APInt &Insn, unsigned InstrBits) { in getInstruction()
153 APInt Insn(16, support::endian::read16be(Bytes.data())); in getInstruction() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFPreserveStaticOffset.cpp209 fillCommonArgs(LLVMContext & C,SmallVector<Value * > & Args,GEPChainInfo & GEP,T * Insn) fillCommonArgs() argument
290 reconstructCommon(CallInst * Call,GetElementPtrInst * GEP,T * Insn,int Delta) reconstructCommon() argument
395 reportNonStaticGEPChain(Instruction * Insn) reportNonStaticGEPChain() argument
460 rewriteUses(Instruction * Insn,SmallVector<GetElementPtrInst * > & GEPs,SmallVector<Instruction * > & Visited,bool AllowPatial,bool & StillUsed) rewriteUses() argument
501 rewriteAccessChain(Instruction * Insn,SmallVector<GetElementPtrInst * > & GEPs,SmallVector<Instruction * > & Visited,bool AllowPatial,bool & StillUsed) rewriteAccessChain() argument
[all...]
H A DBPFCheckAndAdjustIR.cpp387 for (auto &Insn : BB) removeGEPBuiltinsInFunc() local
/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp73 addDagOperandMapping(Record * Rec,DagInit * Dag,CodeGenInstruction & Insn,IndexedMap<OpData> & OperandMap,unsigned BaseIdx) addDagOperandMapping() argument
156 CodeGenInstruction Insn(Operator); evaluateExpansion() local
[all...]
H A DDecoderEmitter.cpp434 insnWithID(insn_t & Insn,unsigned Opcode) const insnWithID() argument
579 insn_t Insn; Filter() local
1024 fieldFromInsn(uint64_t & Field,insn_t & Insn,unsigned StartBit,unsigned NumBits) const fieldFromInsn() argument
1406 insn_t Insn; emitSingletonTableEntry() local
1542 insn_t Insn; filterProcessor() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionPrecedenceTracking.cpp63 const Instruction *Insn) { in isPreceededBySpecialInstruction()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp271 uint64_t &Size, uint32_t &Insn, in readInstruction32()
292 uint32_t Insn; in getInstruction() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp248 uint64_t &Size, uint32_t &Insn, in readInstruction24()
272 uint32_t Insn; in getInstruction() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/
H A DLoongArchDisassembler.cpp156 uint32_t Insn; in getInstruction() local
/freebsd-src/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldELFMips.cpp215 uint32_t Insn = readBytesUnaligned(TargetPtr, 4); in applyMIPSRelocation() local
H A DRuntimeDyldMachOARM.h271 uint32_t Insn = readBytesUnaligned(LocalAddress, 4); in resolveRelocation() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/
H A DVEDisassembler.cpp269 uint64_t &Size, uint64_t &Insn, in readInstruction64()
294 uint64_t Insn; in getInstruction() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp442 uint32_t Insn = support::endian::read32le(PltContents.data() + Byte); findPltEntries() local

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