Lines Matching defs:Insn
278 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
281 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
285 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
287 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
290 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
293 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,
296 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
299 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
304 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,
307 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
310 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
313 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
316 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn,
319 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
322 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
325 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
328 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
331 static DecodeStatus DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn,
346 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
349 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
391 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn,
409 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
412 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
415 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn,
419 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
422 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
425 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
428 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn,
431 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn, uint64_t Address,
433 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Insn,
436 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
439 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
442 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
445 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
448 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
451 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
454 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
456 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
458 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
460 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
462 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
464 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
466 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
468 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
470 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address,
472 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address,
474 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address,
476 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address,
478 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address,
480 static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Insn,
487 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
517 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
520 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
523 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address,
525 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
560 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
563 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
566 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
569 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
591 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
594 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
625 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
630 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address,
654 static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Insn,
677 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn,
680 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn,
683 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn,
690 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address,
692 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address,
694 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn,
698 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address,
700 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,
703 static DecodeStatus DecodeLazyLoadStoreMul(MCInst &Inst, unsigned Insn,
718 uint32_t Insn,
724 uint32_t Cond = (Insn >> 28) & 0xF;
801 uint32_t Insn = llvm::support::endian::read<uint32_t>(Bytes.data(),
806 decodeInstruction(DecoderTableARM32, MI, Insn, Address, this, STI);
809 return checkDecodedInstruction(MI, Size, Address, CS, Insn, Result);
825 Result = decodeInstruction(Table.P, MI, Insn, Address, this, STI);
837 decodeInstruction(DecoderTableCoProc32, MI, Insn, Address, this, STI);
840 return checkDecodedInstruction(MI, Size, Address, CS, Insn, Result);
1863 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
1868 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1869 unsigned CRd = fieldFromInstruction(Insn, 12, 4);
1870 unsigned coproc = fieldFromInstruction(Insn, 8, 4);
1871 unsigned imm = fieldFromInstruction(Insn, 0, 8);
1872 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1873 unsigned U = fieldFromInstruction(Insn, 23, 1);
2043 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
2047 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2048 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
2049 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2050 unsigned imm = fieldFromInstruction(Insn, 0, 12);
2051 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2052 unsigned reg = fieldFromInstruction(Insn, 25, 1);
2053 unsigned P = fieldFromInstruction(Insn, 24, 1);
2054 unsigned W = fieldFromInstruction(Insn, 21, 1);
2097 if (!fieldFromInstruction(Insn, 23, 1))
2114 switch( fieldFromInstruction(Insn, 5, 2)) {
2130 unsigned amt = fieldFromInstruction(Insn, 7, 5);
2192 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,
2205 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
2210 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
2211 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2212 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2213 unsigned type = fieldFromInstruction(Insn, 22, 1);
2214 unsigned imm = fieldFromInstruction(Insn, 8, 4);
2215 unsigned U = ((~fieldFromInstruction(Insn, 23, 1)) & 1) << 8;
2216 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2217 unsigned W = fieldFromInstruction(Insn, 21, 1);
2218 unsigned P = fieldFromInstruction(Insn, 24, 1);
2249 if (!type && fieldFromInstruction(Insn, 8, 4))
2397 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn,
2402 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2403 unsigned mode = fieldFromInstruction(Insn, 23, 2);
2427 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
2432 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2433 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2434 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2435 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2438 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2452 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,
2457 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2458 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2459 unsigned reglist = fieldFromInstruction(Insn, 0, 16);
2517 if (fieldFromInstruction(Insn, 20, 1) == 0) {
2519 if (!(fieldFromInstruction(Insn, 22, 1) == 1 &&
2520 fieldFromInstruction(Insn, 20, 1) == 0))
2524 MCOperand::createImm(fieldFromInstruction(Insn, 0, 4)));
2528 return DecodeRFEInstruction(Inst, Insn, Address, Decoder);
2544 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn,
2547 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2548 unsigned imm8 = fieldFromInstruction(Insn, 0, 8);
2567 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
2570 unsigned imod = fieldFromInstruction(Insn, 18, 2);
2571 unsigned M = fieldFromInstruction(Insn, 17, 1);
2572 unsigned iflags = fieldFromInstruction(Insn, 6, 3);
2573 unsigned mode = fieldFromInstruction(Insn, 0, 5);
2579 if (fieldFromInstruction(Insn, 5, 1) != 0 ||
2580 fieldFromInstruction(Insn, 16, 1) != 0 ||
2581 fieldFromInstruction(Insn, 20, 8) != 0x10)
2615 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
2618 unsigned imod = fieldFromInstruction(Insn, 9, 2);
2619 unsigned M = fieldFromInstruction(Insn, 8, 1);
2620 unsigned iflags = fieldFromInstruction(Insn, 5, 3);
2621 unsigned mode = fieldFromInstruction(Insn, 0, 5);
2648 int imm = fieldFromInstruction(Insn, 0, 8);
2659 DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
2661 unsigned imm = fieldFromInstruction(Insn, 0, 8);
2683 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
2688 unsigned Rd = fieldFromInstruction(Insn, 8, 4);
2691 imm |= (fieldFromInstruction(Insn, 0, 8) << 0);
2692 imm |= (fieldFromInstruction(Insn, 12, 3) << 8);
2693 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2694 imm |= (fieldFromInstruction(Insn, 26, 1) << 11);
2708 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
2713 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2714 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2717 imm |= (fieldFromInstruction(Insn, 0, 12) << 0);
2718 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2736 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
2741 unsigned Rd = fieldFromInstruction(Insn, 16, 4);
2742 unsigned Rn = fieldFromInstruction(Insn, 0, 4);
2743 unsigned Rm = fieldFromInstruction(Insn, 8, 4);
2744 unsigned Ra = fieldFromInstruction(Insn, 12, 4);
2745 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2748 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2765 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
2770 unsigned Pred = fieldFromInstruction(Insn, 28, 4);
2771 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2772 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2775 return DecodeSETPANInstruction(Inst, Insn, Address, Decoder);
2787 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
2792 unsigned Imm = fieldFromInstruction(Insn, 9, 1);
2803 if (fieldFromInstruction(Insn, 20,12) != 0xf11 ||
2804 fieldFromInstruction(Insn, 4,4) != 0)
2806 if (fieldFromInstruction(Insn, 10,10) != 0 ||
2807 fieldFromInstruction(Insn, 0,4) != 0)
2885 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
2896 unsigned S = fieldFromInstruction(Insn, 26, 1);
2897 unsigned J1 = fieldFromInstruction(Insn, 13, 1);
2898 unsigned J2 = fieldFromInstruction(Insn, 11, 1);
2901 unsigned imm10 = fieldFromInstruction(Insn, 16, 10);
2902 unsigned imm11 = fieldFromInstruction(Insn, 0, 11);
2912 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
2917 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2918 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2;
2922 imm |= fieldFromInstruction(Insn, 24, 1) << 1;
2960 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
2965 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2966 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2967 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2968 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2969 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2970 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3237 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn,
3240 unsigned type = fieldFromInstruction(Insn, 8, 4);
3241 unsigned align = fieldFromInstruction(Insn, 4, 2);
3246 unsigned load = fieldFromInstruction(Insn, 21, 1);
3247 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3248 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3251 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn,
3254 unsigned size = fieldFromInstruction(Insn, 6, 2);
3257 unsigned type = fieldFromInstruction(Insn, 8, 4);
3258 unsigned align = fieldFromInstruction(Insn, 4, 2);
3262 unsigned load = fieldFromInstruction(Insn, 21, 1);
3263 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3264 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3267 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn,
3270 unsigned size = fieldFromInstruction(Insn, 6, 2);
3273 unsigned align = fieldFromInstruction(Insn, 4, 2);
3276 unsigned load = fieldFromInstruction(Insn, 21, 1);
3277 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3278 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3281 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn,
3284 unsigned size = fieldFromInstruction(Insn, 6, 2);
3287 unsigned load = fieldFromInstruction(Insn, 21, 1);
3288 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3289 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3292 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,
3297 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3298 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3299 unsigned wb = fieldFromInstruction(Insn, 16, 4);
3300 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3301 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
3302 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3563 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn,
3568 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3569 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3570 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3571 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3572 unsigned align = fieldFromInstruction(Insn, 4, 1);
3573 unsigned size = fieldFromInstruction(Insn, 6, 2);
3611 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn,
3616 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3617 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3618 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3619 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3620 unsigned align = fieldFromInstruction(Insn, 4, 1);
3621 unsigned size = 1 << fieldFromInstruction(Insn, 6, 2);
3660 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn,
3665 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3666 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3667 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3668 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3669 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3696 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,
3701 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3702 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3703 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3704 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3705 unsigned size = fieldFromInstruction(Insn, 6, 2);
3706 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3707 unsigned align = fieldFromInstruction(Insn, 4, 1);
3749 static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn,
3754 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3755 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3756 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3757 imm |= fieldFromInstruction(Insn, 16, 3) << 4;
3758 imm |= fieldFromInstruction(Insn, 24, 1) << 7;
3759 imm |= fieldFromInstruction(Insn, 8, 4) << 8;
3760 imm |= fieldFromInstruction(Insn, 5, 1) << 12;
3761 unsigned Q = fieldFromInstruction(Insn, 6, 1);
3795 static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn,
3800 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
3801 fieldFromInstruction(Insn, 13, 3));
3802 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
3803 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3804 imm |= fieldFromInstruction(Insn, 16, 3) << 4;
3805 imm |= fieldFromInstruction(Insn, 28, 1) << 7;
3807 imm |= fieldFromInstruction(Insn, 5, 1) << 12;
3824 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn,
3829 unsigned Qd = fieldFromInstruction(Insn, 13, 3);
3830 Qd |= fieldFromInstruction(Insn, 22, 1) << 3;
3835 unsigned Qn = fieldFromInstruction(Insn, 17, 3);
3836 Qn |= fieldFromInstruction(Insn, 7, 1) << 3;
3839 unsigned Qm = fieldFromInstruction(Insn, 1, 3);
3840 Qm |= fieldFromInstruction(Insn, 5, 1) << 3;
3843 if (!fieldFromInstruction(Insn, 12, 1)) // I bit clear => need input FPSCR
3850 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn,
3855 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3856 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3857 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3858 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3859 unsigned size = fieldFromInstruction(Insn, 18, 2);
3898 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
3903 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3904 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3905 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3906 Rn |= fieldFromInstruction(Insn, 7, 1) << 4;
3907 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3908 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3909 unsigned op = fieldFromInstruction(Insn, 6, 1);
3935 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
3940 unsigned dst = fieldFromInstruction(Insn, 8, 3);
3941 unsigned imm = fieldFromInstruction(Insn, 0, 8);
4068 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,
4073 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4074 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4109 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4143 unsigned addrmode = fieldFromInstruction(Insn, 4, 2);
4144 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2;
4145 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6;
4152 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
4157 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4158 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4159 unsigned U = fieldFromInstruction(Insn, 9, 1);
4160 unsigned imm = fieldFromInstruction(Insn, 0, 8);
4163 unsigned add = fieldFromInstruction(Insn, 9, 1);
4197 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4237 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
4242 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4243 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4244 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4279 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4318 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address,
4322 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4323 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4324 unsigned imm = fieldFromInstruction(Insn, 0, 8);
4347 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4357 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
4362 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4363 unsigned U = fieldFromInstruction(Insn, 23, 1);
4364 int imm = fieldFromInstruction(Insn, 0, 12);
4598 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,
4603 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4604 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4605 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4606 addr |= fieldFromInstruction(Insn, 9, 1) << 8;
4608 unsigned load = fieldFromInstruction(Insn, 20, 1);
4638 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4687 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn,
4690 unsigned imm = fieldFromInstruction(Insn, 0, 7);
4699 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
4705 unsigned Rdm = fieldFromInstruction(Insn, 0, 3);
4706 Rdm |= fieldFromInstruction(Insn, 7, 1) << 3;
4714 unsigned Rm = fieldFromInstruction(Insn, 3, 4);
4725 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
4728 unsigned imod = fieldFromInstruction(Insn, 4, 1) | 0x2;
4729 unsigned flags = fieldFromInstruction(Insn, 0, 3);
4737 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
4741 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4742 unsigned add = fieldFromInstruction(Insn, 4, 1);
4751 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn,
4755 unsigned Rn = fieldFromInstruction(Insn, 3, 4);
4756 unsigned Qm = fieldFromInstruction(Insn, 0, 3);
4767 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
4771 unsigned Qm = fieldFromInstruction(Insn, 8, 3);
4772 int imm = fieldFromInstruction(Insn, 0, 7);
4777 if(!fieldFromInstruction(Insn, 7, 1)) {
4831 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Insn,
4838 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4839 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4849 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,
4854 unsigned pred = fieldFromInstruction(Insn, 22, 4);
4856 unsigned opc = fieldFromInstruction(Insn, 4, 28);
4871 unsigned imm = fieldFromInstruction(Insn, 0, 4);
4875 unsigned brtarget = fieldFromInstruction(Insn, 0, 11) << 1;
4876 brtarget |= fieldFromInstruction(Insn, 11, 1) << 19;
4877 brtarget |= fieldFromInstruction(Insn, 13, 1) << 18;
4878 brtarget |= fieldFromInstruction(Insn, 16, 6) << 12;
4879 brtarget |= fieldFromInstruction(Insn, 26, 1) << 20;
5093 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
5098 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5099 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5100 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5115 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
5120 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5121 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
5122 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5123 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5141 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
5146 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5147 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5148 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5149 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5150 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5151 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5167 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
5172 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5173 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5174 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5175 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5176 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5177 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5178 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5195 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
5200 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5201 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5202 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5203 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5204 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5205 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5221 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
5226 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5227 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5228 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5229 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5230 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5231 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5247 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5251 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5252 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5253 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5254 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5255 unsigned size = fieldFromInstruction(Insn, 10, 2);
5263 if (fieldFromInstruction(Insn, 4, 1))
5265 index = fieldFromInstruction(Insn, 5, 3);
5268 if (fieldFromInstruction(Insn, 5, 1))
5270 index = fieldFromInstruction(Insn, 6, 2);
5271 if (fieldFromInstruction(Insn, 4, 1))
5275 if (fieldFromInstruction(Insn, 6, 1))
5277 index = fieldFromInstruction(Insn, 7, 1);
5279 switch (fieldFromInstruction(Insn, 4, 2)) {
5314 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5318 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5319 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5320 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5321 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5322 unsigned size = fieldFromInstruction(Insn, 10, 2);
5330 if (fieldFromInstruction(Insn, 4, 1))
5332 index = fieldFromInstruction(Insn, 5, 3);
5335 if (fieldFromInstruction(Insn, 5, 1))
5337 index = fieldFromInstruction(Insn, 6, 2);
5338 if (fieldFromInstruction(Insn, 4, 1))
5342 if (fieldFromInstruction(Insn, 6, 1))
5344 index = fieldFromInstruction(Insn, 7, 1);
5346 switch (fieldFromInstruction(Insn, 4, 2)) {
5379 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5383 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5384 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5385 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5386 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5387 unsigned size = fieldFromInstruction(Insn, 10, 2);
5396 index = fieldFromInstruction(Insn, 5, 3);
5397 if (fieldFromInstruction(Insn, 4, 1))
5401 index = fieldFromInstruction(Insn, 6, 2);
5402 if (fieldFromInstruction(Insn, 4, 1))
5404 if (fieldFromInstruction(Insn, 5, 1))
5408 if (fieldFromInstruction(Insn, 5, 1))
5410 index = fieldFromInstruction(Insn, 7, 1);
5411 if (fieldFromInstruction(Insn, 4, 1) != 0)
5413 if (fieldFromInstruction(Insn, 6, 1))
5446 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5450 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5451 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5452 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5453 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5454 unsigned size = fieldFromInstruction(Insn, 10, 2);
5463 index = fieldFromInstruction(Insn, 5, 3);
5464 if (fieldFromInstruction(Insn, 4, 1))
5468 index = fieldFromInstruction(Insn, 6, 2);
5469 if (fieldFromInstruction(Insn, 4, 1))
5471 if (fieldFromInstruction(Insn, 5, 1))
5475 if (fieldFromInstruction(Insn, 5, 1))
5477 index = fieldFromInstruction(Insn, 7, 1);
5478 if (fieldFromInstruction(Insn, 4, 1) != 0)
5480 if (fieldFromInstruction(Insn, 6, 1))
5509 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5513 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5514 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5515 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5516 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5517 unsigned size = fieldFromInstruction(Insn, 10, 2);
5526 if (fieldFromInstruction(Insn, 4, 1))
5528 index = fieldFromInstruction(Insn, 5, 3);
5531 if (fieldFromInstruction(Insn, 4, 1))
5533 index = fieldFromInstruction(Insn, 6, 2);
5534 if (fieldFromInstruction(Insn, 5, 1))
5538 if (fieldFromInstruction(Insn, 4, 2))
5540 index = fieldFromInstruction(Insn, 7, 1);
5541 if (fieldFromInstruction(Insn, 6, 1))
5579 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5583 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5584 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5585 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5586 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5587 unsigned size = fieldFromInstruction(Insn, 10, 2);
5596 if (fieldFromInstruction(Insn, 4, 1))
5598 index = fieldFromInstruction(Insn, 5, 3);
5601 if (fieldFromInstruction(Insn, 4, 1))
5603 index = fieldFromInstruction(Insn, 6, 2);
5604 if (fieldFromInstruction(Insn, 5, 1))
5608 if (fieldFromInstruction(Insn, 4, 2))
5610 index = fieldFromInstruction(Insn, 7, 1);
5611 if (fieldFromInstruction(Insn, 6, 1))
5642 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5646 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5647 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5648 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5649 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5650 unsigned size = fieldFromInstruction(Insn, 10, 2);
5659 if (fieldFromInstruction(Insn, 4, 1))
5661 index = fieldFromInstruction(Insn, 5, 3);
5664 if (fieldFromInstruction(Insn, 4, 1))
5666 index = fieldFromInstruction(Insn, 6, 2);
5667 if (fieldFromInstruction(Insn, 5, 1))
5671 switch (fieldFromInstruction(Insn, 4, 2)) {
5677 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
5680 index = fieldFromInstruction(Insn, 7, 1);
5681 if (fieldFromInstruction(Insn, 6, 1))
5723 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5727 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5728 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5729 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5730 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5731 unsigned size = fieldFromInstruction(Insn, 10, 2);
5740 if (fieldFromInstruction(Insn, 4, 1))
5742 index = fieldFromInstruction(Insn, 5, 3);
5745 if (fieldFromInstruction(Insn, 4, 1))
5747 index = fieldFromInstruction(Insn, 6, 2);
5748 if (fieldFromInstruction(Insn, 5, 1))
5752 switch (fieldFromInstruction(Insn, 4, 2)) {
5758 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
5761 index = fieldFromInstruction(Insn, 7, 1);
5762 if (fieldFromInstruction(Insn, 6, 1))
5795 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address,
5798 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5799 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
5800 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
5801 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5802 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
5821 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address,
5824 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5825 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
5826 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
5827 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5828 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
5847 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address,
5850 unsigned pred = fieldFromInstruction(Insn, 4, 4);
5851 unsigned mask = fieldFromInstruction(Insn, 0, 4);
5876 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
5881 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5882 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
5883 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5884 unsigned addr = fieldFromInstruction(Insn, 0, 8);
5885 unsigned W = fieldFromInstruction(Insn, 21, 1);
5886 unsigned U = fieldFromInstruction(Insn, 23, 1);
5887 unsigned P = fieldFromInstruction(Insn, 24, 1);
5913 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
5918 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5919 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
5920 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5921 unsigned addr = fieldFromInstruction(Insn, 0, 8);
5922 unsigned W = fieldFromInstruction(Insn, 21, 1);
5923 unsigned U = fieldFromInstruction(Insn, 23, 1);
5924 unsigned P = fieldFromInstruction(Insn, 24, 1);
5948 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address,
5950 unsigned sign1 = fieldFromInstruction(Insn, 21, 1);
5951 unsigned sign2 = fieldFromInstruction(Insn, 23, 1);
5953 const unsigned Rd = fieldFromInstruction(Insn, 8, 4);
5957 unsigned Val = fieldFromInstruction(Insn, 0, 8);
5958 Val |= fieldFromInstruction(Insn, 12, 3) << 8;
5959 Val |= fieldFromInstruction(Insn, 26, 1) << 11;
5985 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address,
5987 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5988 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4);
5989 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5990 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5993 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
6012 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address,
6018 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
6019 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
6020 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
6021 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
6022 unsigned imm = fieldFromInstruction(Insn, 16, 6);
6023 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
6024 unsigned op = fieldFromInstruction(Insn, 5, 1);
6057 return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);
6071 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address,
6077 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
6078 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
6079 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
6080 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
6081 unsigned imm = fieldFromInstruction(Insn, 16, 6);
6082 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
6083 unsigned op = fieldFromInstruction(Insn, 5, 1);
6116 return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);
6131 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn,
6134 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
6135 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
6136 unsigned Vn = (fieldFromInstruction(Insn, 16, 4) << 0);
6137 Vn |= (fieldFromInstruction(Insn, 7, 1) << 4);
6138 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
6139 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
6140 unsigned q = (fieldFromInstruction(Insn, 6, 1) << 0);
6141 unsigned rotate = (fieldFromInstruction(Insn, 20, 2) << 0);
6328 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
6335 unsigned Imm = fieldFromInstruction(Insn, 11, 1) |
6336 fieldFromInstruction(Insn, 1, 10) << 1;
6355 DecoderGPRRegisterClass(Inst, fieldFromInstruction(Insn, 16, 4),
6366 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
6372 if ((Insn & ~SBZMask) != CanonicalLCTP)
6374 if (Insn != CanonicalLCTP)
6381 fieldFromInstruction(Insn, 16, 4),
6443 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address,
6450 unsigned reglist = (fieldFromInstruction(Insn, 1, 7) << 1) |
6451 (fieldFromInstruction(Insn, 12, 4) << 8) |
6452 (fieldFromInstruction(Insn, 22, 1) << 12);
6457 unsigned reglist = fieldFromInstruction(Insn, 0, 8) |
6458 (fieldFromInstruction(Insn, 22, 1) << 8) |
6459 (fieldFromInstruction(Insn, 12, 4) << 9);
6795 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn,
6799 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
6800 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
6801 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
6802 fieldFromInstruction(Insn, 13, 3));
6803 unsigned index = fieldFromInstruction(Insn, 4, 1);
6819 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn,
6823 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
6824 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
6825 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
6826 fieldFromInstruction(Insn, 13, 3));
6827 unsigned index = fieldFromInstruction(Insn, 4, 1);
6846 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address,
6850 unsigned RdaLo = fieldFromInstruction(Insn, 17, 3) << 1;
6851 unsigned RdaHi = fieldFromInstruction(Insn, 9, 3) << 1;
6852 unsigned Rm = fieldFromInstruction(Insn, 12, 4);
6860 unsigned Rda = fieldFromInstruction(Insn, 16, 4);
6887 if (fieldFromInstruction (Insn, 6, 3) != 4)
6917 unsigned Saturate = fieldFromInstruction(Insn, 7, 1);
6925 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn,
6929 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
6930 fieldFromInstruction(Insn, 13, 3));
6931 unsigned Qm = ((fieldFromInstruction(Insn, 5, 1) << 3) |
6932 fieldFromInstruction(Insn, 1, 3));
6933 unsigned imm6 = fieldFromInstruction(Insn, 16, 6);
6946 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address,
6950 unsigned Qn = fieldFromInstruction(Insn, 17, 3);
6957 fc = fieldFromInstruction(Insn, 12, 1) << 2 |
6958 fieldFromInstruction(Insn, 7, 1) |
6959 fieldFromInstruction(Insn, 5, 1) << 1;
6960 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
6964 fc = fieldFromInstruction(Insn, 12, 1) << 2 |
6965 fieldFromInstruction(Insn, 7, 1) |
6966 fieldFromInstruction(Insn, 0, 1) << 1;
6967 unsigned Qm = fieldFromInstruction(Insn, 5, 1) << 4 |
6968 fieldFromInstruction(Insn, 1, 3);
6983 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address,
6987 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
6993 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn,
7002 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,
7005 const unsigned Rd = fieldFromInstruction(Insn, 8, 4);
7006 const unsigned Rn = fieldFromInstruction(Insn, 16, 4);
7007 const unsigned Imm12 = fieldFromInstruction(Insn, 26, 1) << 11 |
7008 fieldFromInstruction(Insn, 12, 3) << 8 |
7009 fieldFromInstruction(Insn, 0, 8);
7010 const unsigned TypeT3 = fieldFromInstruction(Insn, 25, 1);
7011 unsigned sign1 = fieldFromInstruction(Insn, 21, 1);
7012 unsigned sign2 = fieldFromInstruction(Insn, 23, 1);
7013 unsigned S = fieldFromInstruction(Insn, 20, 1);
7037 static DecodeStatus DecodeLazyLoadStoreMul(MCInst &Inst, unsigned Insn,
7042 const unsigned Rn = fieldFromInstruction(Insn, 16, 4);