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Searched defs:Ins (Results 1 – 25 of 67) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCCState.h131 void PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeFormalArguments()
139 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
151 void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResult()
161 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
H A DMipsCCState.cpp87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat()
181 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128()
H A DMipsCallLowering.cpp386 SmallVector<ISD::InputArg, 8> Ins; in lowerFormalArguments() local
556 SmallVector<ISD::InputArg, 8> Ins; in lowerCall() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCCState.cpp27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments()
H A DPPCCCState.h50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp85 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
162 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
264 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp447 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs() argument
551 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult() argument
569 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
592 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
620 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument
809 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
936 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp269 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
471 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
486 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, in LowerCallArguments() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp326 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
409 auto &Ins = CLI.Ins; LowerCall() local
584 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp396 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument
413 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
437 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCArguments() argument
607 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool IsVarArg,bool,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
779 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVETailPredication.cpp441 Instruction *Ins = L->getLoopPreheader()->getTerminator(); in TryConvertActiveLaneMask() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp1095 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult() argument
1293 LowerMemArgument(SDValue Chain,CallingConv::ID CallConv,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,const CCValAssign & VA,MachineFrameInfo & MFI,unsigned i) const LowerMemArgument() argument
1671 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
1984 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; LowerCall() local
2708 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsCalleePopSRet,bool isVarArg,Type * RetTy,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCommonGEP.cpp568 std::pair<NodeSymRel::iterator, bool> Ins = EqRel.insert(C); in common() local
597 std::pair<ProjMap::iterator,bool> Ins = PM.insert(std::make_pair(&S, Min)); in common() local
1239 ValueVect Ins; in removeDeadCode() local
H A DHexagonISelLowering.cpp351 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult() argument
409 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
775 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
2814 SDValue Ins = insertVectorPred() local
2835 SDValue Ins = insertVectorPred() local
3710 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,bool IsCalleeStructRet,bool IsCallerStructRet,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp946 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
1020 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument
1150 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
1169 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DSSAUpdaterImpl.h86 SmallVectorImpl<PhiT *> *Ins) : in SSAUpdaterImpl() argument
/freebsd-src/contrib/llvm-project/llvm/lib/TableGen/
H A DTGParser.h134 bool Ins = Vars.insert(std::make_pair(std::string(Name), I)).second; in addVar() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp248 argsAreStructReturn(const SmallVectorImpl<ISD::InputArg> &Ins) { in argsAreStructReturn() argument
431 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerMemArgument() argument
526 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
885 const SmallVectorImpl<ISD::InputArg> &Ins, cons in LowerCallResult() argument
920 LowerFormalArguments(SDValue Chain,CallingConv::ID CCID,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
1227 IsEligibleForTailCallOptimization(SDValue Callee,CallingConv::ID CalleeCC,bool IsVarArg,bool IsCalleeStructRet,bool IsCallerStructRet,Type * RetTy,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,SelectionDAG & DAG) const IsEligibleForTailCallOptimization() argument
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DFastISel.h97 SmallVector<ISD::InputArg, 4> Ins; member
H A DCallingConvLower.h266 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/
H A DWebAssemblyAsmParser.cpp325 pop(StringRef Ins,NestingType NT1,NestingType NT2=Undefined) pop() argument
339 popAndPushWithSameSignature(StringRef Ins,NestingType PopNT,NestingType PushNT) popAndPushWithSameSignature() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1385 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument
1489 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; LowerCall() local
1663 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLoopConstrainer.cpp396 Instruction *Ins = Preheader->getTerminator(); parseLoopStructure() local
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DStraightLineStrengthReduce.cpp171 Instruction *Ins = nullptr; member
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