Searched defs:Inp (Results 1 – 7 of 7) sorted by relevance
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 1289 OpRef Inp[2] = {Va, Vb}; packs() local
1518 OpRef Inp[2] = { Va, Vb }; packp() local
2574 SDValue Inp = N->getOperand(0); selectExtractSubvector() local
2775 __anon9dd6b35a1a02(SDValue TopShuff, SDValue Inp, MapType &&OpMap) ppHvxShuffleOfShuffle() argument
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| H A D | HexagonISelLoweringHVX.cpp | 2453 SDValue Inp = DAG.getBitcast(IntTy, Val); emitHvxShiftRightRnd() local
2679 SDValue Inp = Op.getOperand(0); EqualizeFpIntConversion() local
2786 SDValue Inp = DAG.getBitcast(ResTy, Op0); ExpandHvxFpToInt() local
3278 SDValue Inp = Op.getOperand(0); ExpandHvxResizeIntoSteps() local
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| H A D | HexagonISelDAGToDAG.cpp | 1059 SDValue Inp = Op, Res; in SelectInlineAsmMemoryOperand() local
707 SDValue Inp = N->getOperand(0); SelectExtractSubvector() local
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| H A D | HexagonBitSimplify.cpp | 1573 bool CopyGeneration::findMatch(const BitTracker::RegisterRef &Inp, in findMatch() argument
2949 BitTracker::RegisterRef Inp, Ou member
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| /llvm-project/clang-tools-extra/clangd/unittests/ |
| H A D | TUSchedulerTests.cpp | 1481 S.runWithAST(Path, Path, [](llvm::Expected<InputsAndAST> Inp) { in TEST_F()
1490 [](llvm::Expected<InputsAndPreamble> Inp) { EXPECT_TRUE(bool(Inp)); }); in TEST_F()
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 13762 SDValue Inp = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, PerformADDVecReduce() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 49399 SDValue Inp = (i == 0) ? Node->getOperand(1) : Node->getOperand(0); combineAndLoadToBZHI() local
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