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Searched defs:Imm (Results 1 – 25 of 262) sorted by relevance

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/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h73 static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) { in getShiftType()
85 static inline unsigned getShiftValue(unsigned Imm) { in getShiftValue()
99 unsigned Imm) { in getShifterImm()
118 static inline unsigned getArithShiftValue(unsigned Imm) { in getArithShiftValue()
123 static inline AArch64_AM::ShiftExtendType getExtendType(unsigned Imm) { in getExtendType()
138 static inline AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm) { in getArithExtendType()
171 unsigned Imm) { in getArithExtendImm()
178 static inline bool getMemDoShift(unsigned Imm) { in getMemDoShift()
184 static inline AArch64_AM::ShiftExtendType getMemExtendType(unsigned Imm) { in getMemExtendType()
213 static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize, in processLogicalImmediate()
[all …]
/llvm-project/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp106 assert(isUInt<18>(Imm) && "Invalid immediate"); in decodeCallOperand() argument
113 assert(isUInt<18>(Imm) && "Invalid immediate"); in decodeJumpOperand() argument
120 decodeBranchOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeBranchOperand() argument
141 decodeL32ROperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeL32ROperand() argument
150 decodeImm8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm8Operand() argument
157 decodeImm8_sh8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm8_sh8Operand() argument
165 decodeImm12Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm12Operand() argument
172 decodeUimm4Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeUimm4Operand() argument
179 decodeUimm5Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeUimm5Operand() argument
186 decodeImm1_16Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeImm1_16Operand() argument
193 decodeShimm1_31Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeShimm1_31Operand() argument
203 decodeB4constOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeB4constOperand() argument
213 decodeB4constuOperand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeB4constuOperand() argument
222 decodeMem8Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem8Operand() argument
230 decodeMem16Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem16Operand() argument
238 decodeMem32Operand(MCInst & Inst,uint64_t Imm,int64_t Address,const void * Decoder) decodeMem32Operand() argument
[all...]
/llvm-project/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp32 void MipsAnalyzeImmediate::GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize, in GetInstSeqLsADDiu()
38 void MipsAnalyzeImmediate::GetInstSeqLsORi(uint64_t Imm, unsigned RemSize, in GetInstSeqLsORi()
44 void MipsAnalyzeImmediate::GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize, in GetInstSeqLsSLL()
51 void MipsAnalyzeImmediate::GetInstSeqLs(uint64_t Imm, unsigned RemSize, in GetInstSeqLs()
97 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi() local
129 &MipsAnalyzeImmediate::Analyze(uint64_t Imm, unsigned Size, in Analyze()
/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp182 if (!isUInt<N>(Imm)) in decodeUImmOperand() argument
190 if (!isUInt<N>(Imm)) in decodeSImmOperand() argument
197 decodeU1ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU1ImmOperand() argument
203 decodeU2ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU2ImmOperand() argument
209 decodeU3ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU3ImmOperand() argument
215 decodeU4ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU4ImmOperand() argument
221 decodeU8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU8ImmOperand() argument
227 decodeU12ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU12ImmOperand() argument
233 decodeU16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU16ImmOperand() argument
239 decodeU32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU32ImmOperand() argument
245 decodeS8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS8ImmOperand() argument
251 decodeS16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS16ImmOperand() argument
257 decodeS20ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS20ImmOperand() argument
263 decodeS32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS32ImmOperand() argument
270 decodeLenOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeLenOperand() argument
280 decodePCDBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,bool isBranch,const MCDisassembler * Decoder) decodePCDBLOperand() argument
293 decodePC12DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC12DBLBranchOperand() argument
299 decodePC16DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC16DBLBranchOperand() argument
305 decodePC24DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC24DBLBranchOperand() argument
311 decodePC32DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLBranchOperand() argument
317 decodePC32DBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLOperand() argument
[all...]
/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h98 inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc()
106 inline unsigned getSOImmValImm(unsigned Imm) { return Imm & 0xFF; } in getSOImmValImm()
109 inline unsigned getSOImmValRot(unsigned Imm) { return (Imm >> 8) * 2; } in getSOImmValRot()
115 inline unsigned getSOImmValRotate(unsigned Imm) { in getSOImmValRotate()
210 inline unsigned getThumbImmValShift(unsigned Imm) { in getThumbImmValShift()
229 inline unsigned getThumbImm16ValShift(unsigned Imm) { in getThumbImm16ValShift()
263 unsigned u, Vs, Imm; in getT2SOImmValSplatVal() local
328 inline bool isT2SOImmTwoPartVal(unsigned Imm) { in isT2SOImmTwoPartVal()
355 inline unsigned getT2SOImmTwoPartFirst(unsigned Imm) { in getT2SOImmTwoPartFirst()
372 inline unsigned getT2SOImmTwoPartSecond(unsigned Imm) { in getT2SOImmTwoPartSecond()
[all …]
/llvm-project/llvm/lib/Target/CSKY/Disassembler/
H A DCSKYDisassembler.cpp227 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, in decodeUImmOperand()
236 static DecodeStatus decodeOImmOperand(MCInst &Inst, uint64_t Imm, in decodeOImmOperand()
244 static DecodeStatus decodeLRW16Imm8(MCInst &Inst, uint64_t Imm, int64_t Address, in decodeLRW16Imm8()
257 static DecodeStatus decodeJMPIXImmOperand(MCInst &Inst, uint64_t Imm, in decodeJMPIXImmOperand()
276 static DecodeStatus DecodeRegSeqOperand(MCInst &Inst, uint64_t Imm, in DecodeRegSeqOperand()
293 static DecodeStatus DecodeRegSeqOperandF1(MCInst &Inst, uint64_t Imm, in DecodeRegSeqOperandF1()
310 static DecodeStatus DecodeRegSeqOperandD1(MCInst &Inst, uint64_t Imm, in DecodeRegSeqOperandD1()
327 static DecodeStatus DecodeRegSeqOperandF2(MCInst &Inst, uint64_t Imm, in DecodeRegSeqOperandF2()
344 static DecodeStatus DecodeRegSeqOperandD2(MCInst &Inst, uint64_t Imm, in DecodeRegSeqOperandD2()
361 static DecodeStatus decodeImmShiftOpValue(MCInst &Inst, uint64_t Imm, in decodeImmShiftOpValue()
[all …]
/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstPrinterCommon.cpp31 int64_t Imm = MI->getOperand(Op).getImm(); in printCondCode() local
64 assert(Imm >= 0 && Imm < 16 && "Invalid condition flags"); in printCondFlags() local
82 int64_t Imm = MI->getOperand(Op).getImm(); printSSEAVXCC() local
124 int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); printVPCOMMnemonic() local
318 int64_t Imm = MI->getOperand(Op).getImm(); printRoundingControl() local
[all...]
H A DX86ShuffleDecode.cpp26 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask, in DecodeINSERTPSMask() argument
99 DecodePSLLDQMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodePSLLDQMask() argument
111 DecodePSRLDQMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodePSRLDQMask() argument
124 DecodePALIGNRMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodePALIGNRMask() argument
138 DecodeVALIGNMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodeVALIGNMask() argument
147 DecodePSHUFMask(unsigned NumElts,unsigned ScalarBits,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodePSHUFMask() argument
163 DecodePSHUFHWMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodePSHUFHWMask() argument
177 DecodePSHUFLWMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodePSHUFLWMask() argument
201 DecodeSHUFPMask(unsigned NumElts,unsigned ScalarBits,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodeSHUFPMask() argument
264 decodeVSHUF64x2FamilyMask(unsigned NumElts,unsigned ScalarSize,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) decodeVSHUF64x2FamilyMask() argument
280 DecodeVPERM2X128Mask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodeVPERM2X128Mask() argument
314 DecodeBLENDMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodeBLENDMask() argument
363 DecodeVPERMMask(unsigned NumElts,unsigned Imm,SmallVectorImpl<int> & ShuffleMask) DecodeVPERMMask() argument
[all...]
/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.h24 Imm, // LUI enumerator
31 int32_t Imm; // The largest value we need to store is 20 bits. variable
H A DRISCVInstPrinter.cpp123 unsigned Imm = MI->getOperand(OpNo).getImm(); printCSRSystemRegister() local
174 unsigned Imm = MI->getOperand(OpNo).getImm(); printFPImmOperand() local
207 unsigned Imm = MI->getOperand(OpNo).getImm(); printVTypeI() local
224 unsigned Imm = MI->getOperand(OpNo).getImm(); printRlist() local
279 int64_t Imm = MI->getOperand(OpNo).getImm(); printStackAdj() local
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/llvm-project/llvm/lib/Target/NVPTX/MCTargetDesc/
H A DNVPTXInstPrinter.cpp98 int64_t Imm = MO.getImm(); printCvtMode() local
155 int64_t Imm = MO.getImm(); printCmpMode() local
229 int Imm = (int) MO.getImm(); printLdStCode() local
280 int Imm = (int)MO.getImm(); printMmaCode() local
319 int64_t Imm = MO.getImm(); printPrmtMode() local
[all...]
/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp105 uint32_t Imm = MI->getOperand(OpNo).getImm(); in printOffset() local
67 int64_t Imm = Op.getImm(); printU16ImmOperand() local
122 uint32_t Imm = MI->getOperand(OpNo).getImm(); printFlatOffset() local
183 auto Imm = MI->getOperand(OpNo).getImm(); printCPol() local
456 printImmediateInt16(uint32_t Imm,const MCSubtargetInfo & STI,raw_ostream & O) printImmediateInt16() argument
471 printImmediateFP16(uint32_t Imm,const MCSubtargetInfo & STI,raw_ostream & O) printImmediateFP16() argument
497 printImmediateBFloat16(uint32_t Imm,const MCSubtargetInfo & STI,raw_ostream & O) printImmediateBFloat16() argument
523 printImmediateBF16(uint32_t Imm,const MCSubtargetInfo & STI,raw_ostream & O) printImmediateBF16() argument
538 printImmediateF16(uint32_t Imm,const MCSubtargetInfo & STI,raw_ostream & O) printImmediateF16() argument
555 printImmediateV216(uint32_t Imm,uint8_t OpType,const MCSubtargetInfo & STI,raw_ostream & O) printImmediateV216() argument
592 printImmediateFloat32(uint32_t Imm,const MCSubtargetInfo & STI,raw_ostream & O) printImmediateFloat32() argument
622 printImmediate32(uint32_t Imm,const MCSubtargetInfo & STI,raw_ostream & O) printImmediate32() argument
637 printImmediate64(uint64_t Imm,const MCSubtargetInfo & STI,raw_ostream & O,bool IsFP) printImmediate64() argument
682 unsigned Imm = MI->getOperand(OpNo).getImm(); printBLGP() local
704 unsigned Imm = MI->getOperand(OpNo).getImm(); printCBSZ() local
714 unsigned Imm = MI->getOperand(OpNo).getImm(); printABID() local
1055 unsigned Imm = MI->getOperand(OpNo).getImm(); printDPP8() local
1068 unsigned Imm = MI->getOperand(OpNo).getImm(); printDPPCtrl() local
1174 unsigned Imm = MI->getOperand(OpNo).getImm(); printDppBoundCtrl() local
1183 unsigned Imm = MI->getOperand(OpNo).getImm(); printDppFI() local
1193 unsigned Imm = MI->getOperand(OpNo).getImm(); printSDWASel() local
1233 unsigned Imm = MI->getOperand(OpNo).getImm(); printSDWADstUnused() local
1433 auto Imm = MI->getOperand(OpNo).getImm() & 0x7; printIndexKey8bit() local
1443 auto Imm = MI->getOperand(OpNo).getImm() & 0x7; printIndexKey16bit() local
1453 unsigned Imm = MI->getOperand(OpNum).getImm(); printInterpSlot() local
1537 int Imm = MI->getOperand(OpNo).getImm(); printOModSI() local
1615 uint16_t Imm = MI->getOperand(OpNo).getImm(); printSwizzle() local
1806 uint16_t Imm = MI->getOperand(OpNo).getImm(); printEndpgm() local
1817 uint8_t Imm = MI->getOperand(OpNo).getImm(); printByteSel() local
[all...]
/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp65 static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm, in decodeCondBrTarget()
72 static DecodeStatus decodeDirectBrTarget(MCInst &Inst, unsigned Imm, in decodeDirectBrTarget()
248 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, in decodeUImmOperand()
258 static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, in decodeSImmOperand()
267 static DecodeStatus decodeImmZeroOperand(MCInst &Inst, uint64_t Imm, in decodeImmZeroOperand()
285 static DecodeStatus decodeDispRIXOperand(MCInst &Inst, uint64_t Imm, in decodeDispRIXOperand()
293 static DecodeStatus decodeDispRIHashOperand(MCInst &Inst, uint64_t Imm, in decodeDispRIHashOperand()
306 static DecodeStatus decodeDispRIX16Operand(MCInst &Inst, uint64_t Imm, in decodeDispRIX16Operand()
314 static DecodeStatus decodeDispSPE8Operand(MCInst &Inst, uint64_t Imm, in decodeDispSPE8Operand()
325 static DecodeStatus decodeDispSPE4Operand(MCInst &Inst, uint64_t Imm, in decodeDispSPE4Operand()
[all …]
/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFInstPrinter.cpp107 int16_t Imm = Op.getImm(); in printBrTargetOperand() local
81 auto Imm = OffsetOp.getImm(); printMemOperand() local
110 int16_t Imm = Op.getImm(); printBrTargetOperand() local
[all...]
/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.h100 bool isInlineImmediate(const APFloat &Imm) const { in isInlineImmediate() argument
104 isInlineImmediate(const APFloat & Imm) isInlineImmediate() argument
H A DAMDGPUMIRFormatter.cpp38 parseImmMnemonic(const unsigned OpCode,const unsigned OpIdx,StringRef Src,int64_t & Imm,ErrorCallbackType ErrorCallback) const parseImmMnemonic() argument
51 printSDelayAluImm(int64_t Imm,llvm::raw_ostream & OS) const printSDelayAluImm() argument
95 parseSDelayAluImmMnemonic(const unsigned int OpIdx,int64_t & Imm,llvm::StringRef & Src,llvm::MIRFormatter::ErrorCallbackType & ErrorCallback) const parseSDelayAluImmMnemonic() argument
[all...]
/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp398 ImmOp Imm; global() member
510 int64_t Imm; isBareSimmNLsb0() local
526 int64_t Imm; isBareSymbol() local
536 int64_t Imm; isCallSymbol() local
547 int64_t Imm; isPseudoJumpSymbol() local
557 int64_t Imm; isTPRelAddSymbol() local
567 int64_t Imm; isTLSDESCCallSymbol() local
579 int64_t Imm; isVTypeImm() local
623 int64_t Imm; isImmXLenLI() local
644 int64_t Imm; isImmXLenLI_Restricted() local
655 int64_t Imm; isUImmLog2XLen() local
666 int64_t Imm; isUImmLog2XLenNonZero() local
679 int64_t Imm; isUImmLog2XLenHalf() local
690 int64_t Imm; IsUImm() local
709 int64_t Imm; isUImm8GE32() local
719 int64_t Imm; isRnumArg() local
729 int64_t Imm; isRnumArg_0_7() local
739 int64_t Imm; isRnumArg_1_10() local
749 int64_t Imm; isRnumArg_2_14() local
762 int64_t Imm; isSImm5() local
772 int64_t Imm; isSImm6() local
782 int64_t Imm; isSImm6NonZero() local
792 int64_t Imm; isCLUIImm() local
803 int64_t Imm; isUImm2Lsb0() local
813 int64_t Imm; isUImm7Lsb00() local
823 int64_t Imm; isUImm8Lsb00() local
833 int64_t Imm; isUImm8Lsb000() local
845 int64_t Imm; isUImm9Lsb000() local
855 int64_t Imm; isUImm10Lsb00NonZero() local
872 int64_t Imm; isSImm12() local
895 int64_t Imm; isSImm12Lsb00000() local
906 int64_t Imm; isSImm10Lsb0000NonZero() local
915 int64_t Imm; isUImm20LUI() local
933 int64_t Imm; isUImm20AUIPC() local
960 int64_t Imm; isImmZero() local
970 int64_t Imm; isSImm5Plus1() local
1181 int64_t Imm = 0; addExpr() local
1210 int Imm = RISCVLoadFPImm::getLoadFPImm( addFPImmOperands() local
1230 int64_t Imm = 0; addVTypeIOperands() local
1747 int64_t Imm = CE->getValue(); parseInsnDirectiveOpcode() local
1802 int64_t Imm = CE->getValue(); parseInsnCDirectiveOpcode() local
1861 int64_t Imm = CE->getValue(); parseCSRSystemRegister() local
2366 unsigned Imm = 0; parseFenceArg() local
3536 int64_t Imm = Inst.getOperand(1).getImm(); processInstruction() local
3645 int64_t Imm = Inst.getOperand(2).getImm(); processInstruction() local
3658 int64_t Imm = Inst.getOperand(2).getImm(); processInstruction() local
[all...]
/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp80 getI32Imm(unsigned Imm,const SDLoc & DL) getI32Imm() argument
114 int32_t Imm = CN->getSExtValue(); INITIALIZE_PASS() local
136 int16_t Imm = CN->getSExtValue(); selectAddrRiSpls() local
149 int16_t Imm = CN->getSExtValue(); selectAddrRiSpls() local
355 SDValue Imm = CurDAG->getTargetConstant(0, DL, MVT::i32); selectFrameIndex() local
[all...]
H A DLanaiTargetTransformInfo.h52 InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, in getIntImmCost() argument
88 const APInt &Imm, Type *Ty, in getIntImmCostIntrin() argument
[all...]
/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp88 static DecodeStatus decodeSOPPBrTarget(MCInst &Inst, unsigned Imm, in decodeSOPPBrTarget() argument
103 decodeSMEMOffset(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) decodeSMEMOffset() argument
169 decodeSrcOp(MCInst & Inst,unsigned EncSize,AMDGPUDisassembler::OpWidthTy OpWidth,unsigned Imm,unsigned EncImm,bool MandatoryLiteral,unsigned ImmWidth,AMDGPU::OperandSemantics Sema,const MCDisassembler * Decoder) decodeSrcOp() argument
189 decodeAV10(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeAV10() argument
197 decodeSrcReg9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcReg9() argument
208 decodeSrcA9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcA9() argument
217 decodeSrcAV10(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcAV10() argument
231 decodeSrcRegOrImm9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcRegOrImm9() argument
242 decodeSrcRegOrImmA9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcRegOrImmA9() argument
251 decodeSrcRegOrImmDeferred9(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeSrcRegOrImmDeferred9() argument
305 DecodeVGPR_16_Lo128RegisterClass(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) DecodeVGPR_16_Lo128RegisterClass() argument
315 decodeOperand_VSrcT16_Lo128(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeOperand_VSrcT16_Lo128() argument
331 decodeOperand_VSrcT16(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeOperand_VSrcT16() argument
347 decodeOperand_KImmFP(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) decodeOperand_KImmFP() argument
374 decodeAVLdSt(MCInst & Inst,unsigned Imm,AMDGPUDisassembler::OpWidthTy Opw,const MCDisassembler * Decoder) decodeAVLdSt() argument
409 decodeAVLdSt(MCInst & Inst,unsigned Imm,uint64_t,const MCDisassembler * Decoder) decodeAVLdSt() argument
415 decodeOperand_VSrc_f64(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) decodeOperand_VSrc_f64() argument
1261 decodeIntImmed(unsigned Imm) decodeIntImmed() argument
1271 getInlineImmVal32(unsigned Imm) getInlineImmVal32() argument
1296 getInlineImmVal64(unsigned Imm) getInlineImmVal64() argument
1321 getInlineImmValF16(unsigned Imm) getInlineImmValF16() argument
1346 getInlineImmValBF16(unsigned Imm) getInlineImmValBF16() argument
1371 getInlineImmVal16(unsigned Imm,AMDGPU::OperandSemantics Sema) getInlineImmVal16() argument
1376 decodeFPImmed(unsigned ImmWidth,unsigned Imm,AMDGPU::OperandSemantics Sema) decodeFPImmed() argument
[all...]
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp348 smallData(*this, MI, *OutStreamer, Imm, 4, getSubtargetInfo()); in HexagonProcessInstruction() local
182 smallData(AsmPrinter & AP,const MachineInstr & MI,MCStreamer & OutStreamer,const MCOperand & Imm,int AlignSize,const MCSubtargetInfo & STI) smallData() argument
329 const MCOperand &Imm = MappedInst.getOperand(1); HexagonProcessInstruction() local
429 int64_t Imm; HexagonProcessInstruction() local
457 int64_t Imm; HexagonProcessInstruction() local
493 int64_t Imm; HexagonProcessInstruction() local
524 int64_t Imm; HexagonProcessInstruction() local
581 MCOperand &Imm = MappedInst.getOperand(2); HexagonProcessInstruction() local
[all...]
/llvm-project/llvm/include/llvm/CodeGen/
H A DMIRFormatter.h44 std::optional<unsigned> OpIdx, int64_t Imm) const { in printImm()
51 StringRef Src, int64_t &Imm, in parseImmMnemonic()
/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp892 DecodeFixedPointScaleImm32(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeFixedPointScaleImm32() argument
901 DecodeFixedPointScaleImm64(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeFixedPointScaleImm64() argument
908 DecodePCRelLabel16(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodePCRelLabel16() argument
923 DecodePCRelLabel19(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodePCRelLabel19() argument
938 DecodeMemExtend(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeMemExtend() argument
946 DecodeMRSSystemRegister(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeMRSSystemRegister() argument
956 DecodeMSRSystemRegister(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeMSRSystemRegister() argument
987 DecodeVecShiftRImm(MCInst & Inst,unsigned Imm,unsigned Add) DecodeVecShiftRImm() argument
993 DecodeVecShiftLImm(MCInst & Inst,unsigned Imm,unsigned Add) DecodeVecShiftLImm() argument
999 DecodeVecShiftR64Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR64Imm() argument
1005 DecodeVecShiftR64ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR64ImmNarrow() argument
1011 DecodeVecShiftR32Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR32Imm() argument
1017 DecodeVecShiftR32ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR32ImmNarrow() argument
1023 DecodeVecShiftR16Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR16Imm() argument
1029 DecodeVecShiftR16ImmNarrow(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR16ImmNarrow() argument
1035 DecodeVecShiftR8Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftR8Imm() argument
1041 DecodeVecShiftL64Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL64Imm() argument
1047 DecodeVecShiftL32Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL32Imm() argument
1053 DecodeVecShiftL16Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL16Imm() argument
1059 DecodeVecShiftL8Imm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeVecShiftL8Imm() argument
1835 unsigned Imm = fieldFromInstruction(insn, 10, 14); DecodeAddSubImmShift() local
2018 DecodeSImm(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeSImm() argument
2033 DecodeImm8OptLsl(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeImm8OptLsl() argument
2045 DecodeSVEIncDecImm(MCInst & Inst,unsigned Imm,uint64_t Addr,const MCDisassembler * Decoder) DecodeSVEIncDecImm() argument
2052 DecodeSVCROp(MCInst & Inst,unsigned Imm,uint64_t Address,const MCDisassembler * Decoder) DecodeSVCROp() argument
[all...]
/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp53 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue(); in INITIALIZE_PASS() local
76 SDValue Imm = CurDAG->getTargetConstant(0, DL, GRLenVT); INITIALIZE_PASS() local
134 SDValue Imm = CurDAG->getTargetConstant(SplatValue, DL, INITIALIZE_PASS() local
270 uint64_t Imm = N.getConstantOperandVal(0); selectShiftMask() local
329 selectVSplat(SDNode * N,APInt & Imm,unsigned MinSizeInBits) const selectVSplat() argument
[all...]
/llvm-project/llvm/lib/Target/X86/
H A DX86CompressEVEX.cpp129 Imm.setImm(Imm.getImm() * Scale); in performCustomAdjustments() local
144 int64_t ImmVal = Imm.getImm(); in performCustomAdjustments() local
166 int64_t ImmVal = Imm.getImm(); in performCustomAdjustments() local

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