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Searched defs:HwMode (Results 1 – 10 of 10) sorted by relevance

/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenHwModes.h30 struct HwMode { struct
51 const HwMode &getMode(unsigned Id) const { in getMode() argument
H A DCodeGenHwModes.cpp21 HwMode::HwMode(const Record *R) { in HwMode() function in HwMode
/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.cpp33 LoongArchRegisterInfo::LoongArchRegisterInfo(unsigned HwMode) in LoongArchRegisterInfo()
/llvm-project/llvm/utils/TableGen/
H A DCodeEmitterGen.cpp397 emitInstructionBaseValues(raw_ostream & o,ArrayRef<const CodeGenInstruction * > NumberedInstructions,CodeGenTarget & Target,unsigned HwMode) emitInstructionBaseValues() argument
528 for (unsigned HwMode : HwModes) { run() local
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/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVRegisterBankInfo.cpp112 RISCVRegisterBankInfo::RISCVRegisterBankInfo(unsigned HwMode) in RISCVRegisterBankInfo() argument
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp56 HexagonRegisterInfo(unsigned HwMode) HexagonRegisterInfo() argument
/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterBankInfo.h398 unsigned HwMode; variable
H A DTargetRegisterInfo.h267 unsigned HwMode; global() variable
/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp55 RISCVRegisterInfo(unsigned HwMode) RISCVRegisterInfo() argument
/llvm-project/llvm/lib/CodeGen/
H A DRegisterBankInfo.cpp58 unsigned HwMode) in RegisterBankInfo() argument