Revision tags: llvmorg-21-init |
|
#
4e8c9d28 |
| 16-Jan-2025 |
Jay Foad <jay.foad@amd.com> |
[TableGen] Use std::pair instead of std::make_pair. NFC. (#123174)
Also use brace initialization and emplace to avoid explicitly
constructing std::pair, and the same for std::tuple.
|
Revision tags: llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
|
#
cdacc9b5 |
| 29-Oct-2024 |
Jerry Sun <105613447+jerryyiransun@users.noreply.github.com> |
[TableGen] [NFC] Refine TableGen code to comply with `clang-tidy` checks (#113318)
Code cleanups for TableGen files, changes includes function names,
variable names and unused imports.
---------
[TableGen] [NFC] Refine TableGen code to comply with `clang-tidy` checks (#113318)
Code cleanups for TableGen files, changes includes function names,
variable names and unused imports.
---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault@amd.com>
show more ...
|
Revision tags: llvmorg-19.1.3 |
|
#
62e2c7fb |
| 18-Oct-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[LLVM][TableGen] Change all `Init` pointers to const (#112705)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-
[LLVM][TableGen] Change all `Init` pointers to const (#112705)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
show more ...
|
Revision tags: llvmorg-19.1.2, llvmorg-19.1.1 |
|
#
87da9e2f |
| 18-Sep-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[LLVM][TableGen] Change CodeEmitterGen to use const RecordKeeper (#109025)
Change CodeEmitterGen to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
[LLVM][TableGen] Change CodeEmitterGen to use const RecordKeeper (#109025)
Change CodeEmitterGen to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
show more ...
|
Revision tags: llvmorg-19.1.0 |
|
#
37865681 |
| 11-Sep-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[TableGen] Change CodeGenInstruction record members to const (#107921)
Change CodeGenInstruction::{TheDef, InfereredFrom} to const pointers.
This is a part of effort to have better const correctn
[TableGen] Change CodeGenInstruction record members to const (#107921)
Change CodeGenInstruction::{TheDef, InfereredFrom} to const pointers.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
show more ...
|
#
985600dc |
| 09-Sep-2024 |
Rahul Joshi <rjoshi@nvidia.com> |
[TableGen] Migrate CodeGenHWModes to use const RecordKeeper (#107851)
Migrate CodeGenHWModes to use const RecordKeeper and const Record
pointers.
This is a part of effort to have better const co
[TableGen] Migrate CodeGenHWModes to use const RecordKeeper (#107851)
Migrate CodeGenHWModes to use const RecordKeeper and const Record
pointers.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
show more ...
|
Revision tags: llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6 |
|
#
ffc9a309 |
| 05-May-2024 |
superZWT123 <zhengwentao3@huawei.com> |
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
1. Bitwise operations are used to access HwMode, allowing for the
coexistence of HwMode IDs for different features (such as RegInfo
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
1. Bitwise operations are used to access HwMode, allowing for the
coexistence of HwMode IDs for different features (such as RegInfo and
EncodingInfo). This will provide better scalability for HwMode.
Currently, most users utilize HwMode primarily for configuring
Register-related information, and few use it for configuring Encoding.
The limited scalability of HwMode has been a significant factor in this
usage pattern.
2. Sink the HwMode Encodings selection logic down to per instruction
level, this makes the logic for choosing encodings clearer and provides
better error messages.
3. Add some HwMode ID conflict detection to the getHwMode() interface.
show more ...
|
Revision tags: llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3 |
|
#
fa3d789d |
| 25-Mar-2024 |
Pierre van Houtryve <pierre.vanhoutryve@amd.com> |
[RFC][TableGen] Restructure TableGen Source (#80847)
Refactor of the llvm-tblgen source into:
- a "Basic" library, which contains the bare minimum utilities to build
`llvm-min-tablegen`
- a "Comm
[RFC][TableGen] Restructure TableGen Source (#80847)
Refactor of the llvm-tblgen source into:
- a "Basic" library, which contains the bare minimum utilities to build
`llvm-min-tablegen`
- a "Common" library which contains all of the helpers for TableGen
backends. Such helpers can be shared by more than one backend, and even
unit tested (e.g. CodeExpander is, maybe we can add more over time)
Fixes #80647
show more ...
|
Revision tags: llvmorg-18.1.2 |
|
#
6f7e940c |
| 11-Mar-2024 |
Jason Eckhardt <jeckhardt@nvidia.com> |
[TableGen] More efficiency improvements for encode/decode emission. (#84647)
DecoderEmitter and CodeEmitterGen perform repeated linear walks over the
entire instruction list. This patch eliminates
[TableGen] More efficiency improvements for encode/decode emission. (#84647)
DecoderEmitter and CodeEmitterGen perform repeated linear walks over the
entire instruction list. This patch eliminates two more such walks.
The eliminated traversals visit every instruction merely to determine
whether the target has variable length encodings. For a target with
variable length encodings, the original any_of will terminate quickly.
But all targets other than M68k use fixed length encodings and thus
any_of must visit the entire instruction list.
show more ...
|
Revision tags: llvmorg-18.1.1 |
|
#
ad43ea33 |
| 28-Feb-2024 |
Jason Eckhardt <jeckhardt@nvidia.com> |
[TableGen] Add support for DefaultMode in per-HwMode encode/decode. (#83029)
Currently the decoder and encoder emitters will crash if DefaultMode is
used within an EncodingByHwMode. As can be done
[TableGen] Add support for DefaultMode in per-HwMode encode/decode. (#83029)
Currently the decoder and encoder emitters will crash if DefaultMode is
used within an EncodingByHwMode. As can be done today for
RegInfoByHwMode and ValueTypeByHwMode, this patch adds support for this
usage in EncodingByHwMode:
let EncodingInfos =
EncodingByHwMode<[ModeA, DefaultMode], [EncA, EncDefault]>;
show more ...
|
Revision tags: llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3 |
|
#
f723260a |
| 14-Feb-2024 |
Jay Foad <jay.foad@amd.com> |
[TableGen] Stop using make_pair and make_tuple. NFC. (#81730)
These are unnecessary since C++17.
|
#
b9079baa |
| 09-Feb-2024 |
Pierre van Houtryve <pierre.vanhoutryve@amd.com> |
[NFC] clang-format utils/TableGen (#80973)
```
find llvm/utils/TableGen -iname "*.h" -o -iname "*.cpp" | xargs clang-format-16 -i
```
Split from #80847
|
Revision tags: llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init |
|
#
c05eff2f |
| 20-Jul-2023 |
Ilya Leoshkevich <iii@linux.ibm.com> |
[TableGen][CodeEmitterGen] Avoid empty OpNum switches in getOperandBitOffset()
getOperandBitOffset() causes the following warning on MSVC:
E:\llvm\ninja\lib\Target\SystemZ\SystemZGenMCCodeEmitter.
[TableGen][CodeEmitterGen] Avoid empty OpNum switches in getOperandBitOffset()
getOperandBitOffset() causes the following warning on MSVC:
E:\llvm\ninja\lib\Target\SystemZ\SystemZGenMCCodeEmitter.inc(15414): warning C4060: switch statement contains no 'case' or 'default' labels
Do not emit empty OpNum switches.
Reviewed By: RKSimon, uweigand
Differential Revision: https://reviews.llvm.org/D155805
show more ...
|
#
8b655e1f |
| 20-Jul-2023 |
Ilya Leoshkevich <iii@linux.ibm.com> |
[TableGen][CodeEmitterGen] Add support for querying operand bit offsets
In order to generate relocations or to apply fixups after the layout has been computed, the targets need to know the offsets o
[TableGen][CodeEmitterGen] Add support for querying operand bit offsets
In order to generate relocations or to apply fixups after the layout has been computed, the targets need to know the offsets of the respective operands. There are indirect ways to figure them out in some cases, for example, on SystemZ, the first memory operand is always at offset 2, and the second one is always at offset 4. But there are no such tricks for the immediate operands on SystemZ, so one has to refer to individual instruction encodings.
This information, however, is available to TableGen. Generate the getOperandBitOffset() method to access it, and use it to simplify getting memory operand offsets on SystemZ. This also paves the way for implementing symbolic immediates on this platform.
For the multi-lit operands, getOperandBitOffset() returns the offset of the first lit.
An alternative way to obtain offsets would be to pass them to the encoder methods, but this would require reworking all targets. Also, VarLenCodeEmitter already does this, but adopting it requires reworking the respective targets without other significant benefits.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D155329
show more ...
|
Revision tags: llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3 |
|
#
66219728 |
| 21-Apr-2023 |
Akshay Khadse <akshayskhadse@gmail.com> |
[Coverity] Fix uninitialized scalar members in TableGen
This change fixes static code analysis warnings
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D148815
|
Revision tags: llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3 |
|
#
9c93e728 |
| 19-Feb-2023 |
NAKAMURA Takumi <geek4civic@gmail.com> |
llvm-tblgen: Rewrite emitters to use `TableGen::Emitter`
Each emitter became self-contained since it has the registration of option.
Differential Revision: https://reviews.llvm.org/D144351
|
#
a7e2b749 |
| 18-Feb-2023 |
NAKAMURA Takumi <geek4civic@gmail.com> |
llvm-tblgen: Cleanup for each EmitterClass to be invoked by uniform signature.
Differential Revision: https://reviews.llvm.org/D144351
|
#
b87dc356 |
| 08-Feb-2023 |
James Y Knight <jyknight@google.com> |
[TableGen] Delete support for deprecated positional matching.
After the work in a538d1f13a13 5351878ba196 372240dfe3d5, and subsequently cleanup of all the in-tree targets, we can now delete the sup
[TableGen] Delete support for deprecated positional matching.
After the work in a538d1f13a13 5351878ba196 372240dfe3d5, and subsequently cleanup of all the in-tree targets, we can now delete the support for positional operand matching!
This removes three options which could previously be set in a Target's "InstrInfo" tablegen definition: - useDeprecatedPositionallyEncodedOperands - decodePositionallyEncodedOperands - noNamedPositionallyEncodedOperands
(Also announced at https://discourse.llvm.org/t/tablegen-deleting-deprecated-positional-instruction-operand-matching-support/68524)
Differential Revision: https://reviews.llvm.org/D144210
show more ...
|
#
aeafcbcd |
| 18-Feb-2023 |
NAKAMURA Takumi <geek4civic@gmail.com> |
llvm-tblgen: Add "TableGenBackends.h" to each emitter.
"TableGenBackends.h" has declarations of emitters.
|
#
afde3f54 |
| 16-Feb-2023 |
NAKAMURA Takumi <geek4civic@gmail.com> |
llvm-tblgen: Apply IWYU partially
|
Revision tags: llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7 |
|
#
38818b60 |
| 04-Jan-2023 |
serge-sans-paille <sguelton@mozilla.com> |
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
Use deduction guides instead of helper functions.
The only non-automatic changes have been:
1. ArrayRef(some_uint8_pointer, 0
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
Use deduction guides instead of helper functions.
The only non-automatic changes have been:
1. ArrayRef(some_uint8_pointer, 0) needs to be changed into ArrayRef(some_uint8_pointer, (size_t)0) to avoid an ambiguous call with ArrayRef((uint8_t*), (uint8_t*)) 2. CVSymbol sym(makeArrayRef(symStorage)); needed to be rewritten as CVSymbol sym{ArrayRef(symStorage)}; otherwise the compiler is confused and thinks we have a (bad) function prototype. There was a few similar situation across the codebase. 3. ADL doesn't seem to work the same for deduction-guides and functions, so at some point the llvm namespace must be explicitly stated. 4. The "reference mode" of makeArrayRef(ArrayRef<T> &) that acts as no-op is not supported (a constructor cannot achieve that).
Per reviewers' comment, some useless makeArrayRef have been removed in the process.
This is a follow-up to https://reviews.llvm.org/D140896 that introduced the deduction guides.
Differential Revision: https://reviews.llvm.org/D140955
show more ...
|
Revision tags: llvmorg-15.0.6, llvmorg-15.0.5 |
|
#
372240df |
| 08-Nov-2022 |
James Y Knight <jyknight@google.com> |
[TableGen] More named sub-operands work.
Commit a538d1f13a13 first added support for named sub-operands in CodeEmitterGen. We now add a few more features to that, enabling further target cleanups.
[TableGen] More named sub-operands work.
Commit a538d1f13a13 first added support for named sub-operands in CodeEmitterGen. We now add a few more features to that, enabling further target cleanups.
1. Adds support for handling an EncoderMethod in a sub-operand in CodeEmitterGen. Previously, the specified encoder of a sub-operand was ignored, and only the default used.
2. Adds support for sub-operands in DecoderEmitter, along with support for tied sub-operands.
The changes to the decoder required a few minor tweaks to a few targets, where existing brokeness was exposed. In order to keep this patch small, I left FIXMEs which will be addressed in upcoming patches. (Except MIPS16, since its object file emission/decoding is totally broken).
Differential Revision: https://reviews.llvm.org/D137653
show more ...
|
Revision tags: llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2 |
|
#
5351878b |
| 20-Sep-2022 |
James Y Knight <jyknight@google.com> |
[TableGen] Add useDeprecatedPositionallyEncodedOperands option.
Summary: The existing undefined-bitfield-to-operand matching behavior is very hard to understand, due to the combination of positional
[TableGen] Add useDeprecatedPositionallyEncodedOperands option.
Summary: The existing undefined-bitfield-to-operand matching behavior is very hard to understand, due to the combination of positional and named matching. This can make it difficult to track down a bug in a target's instruction definitions.
Over the last decade, folks have tried to work-around this in various ways, but it's time to finally ditch the positional matching. With https://reviews.llvm.org/D131003, there are no longer cases that _require_ positional matching, and it's time to start removing usage and support for it.
Therefore: add a (default-false) option, and set it to true only in those targets that require positional matching today. Subsequent changes will start cleaning up additional in-tree targets.
NOTE TO OUT OF TREE TARGET MAINTAINERS:
If this change breaks your build, you may restore the previous behavior simply by adding: let useDeprecatedPositionallyEncodedOperands = 1; to your target's InstrInfo tablegen definition. However, this is temporary -- the option will be removed in the future.
If your target does not set 'decodePositionallyEncodedOperands', you may thus start migrating to named operands. However, if you _do_ currently set that option, I recommend waiting until a subsequent change lands, which adds decoder support for named sub-operands.
Differential Revision: https://reviews.llvm.org/D134073
show more ...
|
Revision tags: llvmorg-15.0.1 |
|
#
a538d1f1 |
| 05-Sep-2022 |
James Y Knight <jyknight@google.com> |
[TableGen][CodeEmitterGen] Allow local names for sub-operands in a operand list.
These names can then be matched by name against 'bits' fields in a record, to populate an instruction's encoding.
Th
[TableGen][CodeEmitterGen] Allow local names for sub-operands in a operand list.
These names can then be matched by name against 'bits' fields in a record, to populate an instruction's encoding.
This does _not_ yet change DecoderEmitter to allow by-name matching of sub-operands. Unlike the encoder, the decoder already defaulted to not supporting positional matching, and backends had workarounds in place for the missing decoding support.
Additionally, use this new capability to allow the ARM and AArch64 backends not to require any positional operand matching.
Differential Revision: https://reviews.llvm.org/D131003
show more ...
|
#
b5137ffd |
| 19-Sep-2022 |
Fangrui Song <i@maskray.me> |
[TableGen] Optimize APInt |= with setBit. NFC
|