Searched defs:Hi1 (Results 1 – 9 of 9) sorted by relevance
| /llvm-project/clang/test/SemaCXX/ |
| H A D | warn-bitfield-enum-conversion.cpp | 4 enum TwoBits { Hi1 = 3 } two_bits; enumerator
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| /llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 467 unsigned Hi1 = (Value >> 11) & 0x1; adjustFixupValue() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 748 SDValue Hi1 = Node->getOperand(1); trySelect() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 864 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, SelectADD_SUB_I64() local
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| H A D | SIISelLowering.cpp | 5706 SDValue Lo1, Hi1; splitBinaryVectorOp() local
5735 SDValue Lo1, Hi1; splitTernaryVectorOp() local
10432 SDValue Hi1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, One); LowerSELECT() local
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| H A D | AMDGPUInstructionSelector.cpp | 367 MachineOperand Hi1(getSubOperand64(I.getOperand(1), HalfRC, AMDGPU::sub1)); selectG_ADD_SUB() local
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 4067 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; SplitVecOp_VSETCC() local
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| H A D | TargetLowering.cpp | 5057 SDValue Lo0, Lo1, Hi0, Hi1; SimplifySetCC() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9445 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2)); isExtendedBUILD_VECTOR() local
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