/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonFrameLowering.cpp | 596 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock() local 769 auto &HII in insertEpilogueInBlock() local 891 auto &HII = *HST.getInstrInfo(); insertAllocframe() local 1037 auto &HII = *HST.getInstrInfo(); insertCFIInstructionsAt() local 1371 auto &HII = *HST.getInstrInfo(); insertCSRSpillsInBlock() local 1437 auto &HII = *HST.getInstrInfo(); insertCSRRestoresInBlock() local 1721 expandCopy(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandCopy() argument 1742 expandStoreInt(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandStoreInt() argument 1775 expandLoadInt(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandLoadInt() argument 1806 expandStoreVecPred(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandStoreVecPred() argument 1843 expandLoadVecPred(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandLoadVecPred() argument 1878 expandStoreVec2(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandStoreVec2() argument 1938 expandLoadVec2(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandLoadVec2() argument 1979 expandStoreVec(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandStoreVec() argument 2008 expandLoadVec(MachineBasicBlock & B,MachineBasicBlock::iterator It,MachineRegisterInfo & MRI,const HexagonInstrInfo & HII,SmallVectorImpl<Register> & NewRegs) const expandLoadVec() argument 2035 auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); expandSpillMacros() local 2169 auto &HII = *HST.getInstrInfo(); optimizeSpillSlots() local 2489 expandAlloca(MachineInstr * AI,const HexagonInstrInfo & HII,Register SP,unsigned CF) const expandAlloca() argument [all...] |
H A D | HexagonHazardRecognizer.h | 49 const HexagonInstrInfo *HII, in HexagonHazardRecognizer()
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H A D | HexagonISelDAGToDAG.h | 30 const HexagonInstrInfo *HII; variable
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H A D | HexagonRDFOpt.cpp | 222 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII()); rewrite() local 296 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); runOnMachineFunction() local
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H A D | HexagonFixupHwLoops.cpp | 112 const HexagonInstrInfo *HII = in fixupLoopInstrs() local
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H A D | HexagonSubtarget.cpp | 303 shouldTFRICallBind(const HexagonInstrInfo & HII,const SUnit & Inst1,const SUnit & Inst2) const shouldTFRICallBind() argument 323 auto &HII = *DAG->MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); apply() local 386 const auto &HII = static_cast<const HexagonInstrInfo&>(*DAG->TII); apply() local
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H A D | HexagonBranchRelaxation.cpp | 69 const HexagonInstrInfo *HII; member
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H A D | HexagonVLIWPacketizer.cpp | 116 const HexagonInstrInfo *HII = nullptr; member in __anon2aa0682f0111::HexagonPacketizer 567 getPredicateSense(const MachineInstr & MI,const HexagonInstrInfo * HII) getPredicateSense() argument 576 getPostIncrementOperand(const MachineInstr & MI,const HexagonInstrInfo * HII) getPostIncrementOperand() argument 1106 cannotCoexistAsymm(const MachineInstr & MI,const MachineInstr & MJ,const HexagonInstrInfo & HII) cannotCoexistAsymm() argument [all...] |
H A D | HexagonVExtract.cpp | 55 const HexagonInstrInfo *HII = nullptr; member in __anon130ab00c0111::HexagonVExtract
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H A D | HexagonBitSimplify.cpp | 652 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits() argument 995 const HexagonInstrInfo &HII; member in __anone396fac70411::DeadCodeElimination 1097 const HexagonInstrInfo &HII; member in __anone396fac70511::RedundantInstrElimination 1415 const HexagonInstrInfo &HII; global() member in __anone396fac70611::ConstGeneration 1544 const HexagonInstrInfo &HII; global() member in __anone396fac70711::CopyGeneration 1819 const HexagonInstrInfo &HII; global() member in __anone396fac70811::BitSimplification 2800 auto &HII = *HST.getInstrInfo(); runOnMachineFunction() local 2935 const HexagonInstrInfo *HII = nullptr; global() member in __anone396fac70d11::HexagonLoopRescheduling [all...] |
H A D | HexagonRegisterInfo.cpp | 220 auto &HII = *HST.getInstrInfo(); in eliminateFrameIndex() local
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H A D | HexagonGenMux.cpp | 88 const HexagonInstrInfo *HII = nullptr; member in __anon4218d0cf0111::HexagonGenMux
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H A D | HexagonAsmPrinter.cpp | 765 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); emitInstruction() local
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H A D | HexagonOptAddrMode.cpp | 83 const HexagonInstrInfo *HII = nullptr; global() member in __anonb17737ae0111::HexagonOptAddrMode [all...] |
H A D | HexagonEarlyIfConv.cpp | 213 const HexagonInstrInfo *HII = nullptr; member in __anon5da953dd0111::HexagonEarlyIfConversion [all...] |
H A D | HexagonExpandCondsets.cpp | 166 const HexagonInstrInfo *HII = nullptr; member in __anon95dbea3e0111::HexagonExpandCondsets [all...] |
H A D | HexagonGenInsert.cpp | 567 const HexagonInstrInfo *HII = nullptr; member in __anon6da4226a0511::HexagonGenInsert
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H A D | HexagonConstExtenders.cpp | 383 const HexagonInstrInfo *HII = nullptr; member [all...] |
H A D | HexagonConstPropagation.cpp | 1886 const HexagonInstrInfo &HII; member in __anonf1f9b0260611::HexagonConstEvaluator
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