Searched defs:EltSizeInBits (Results 1 – 6 of 6) sorted by relevance
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3190 unsigned EltSizeInBits = VT.getScalarSizeInBits(); decomposeMulByConstant() local 4626 unsigned EltSizeInBits = VT.getScalarSizeInBits(); getPack() local 4737 getTargetConstantBitsFromNode(SDValue Op,unsigned EltSizeInBits,APInt & UndefElts,SmallVectorImpl<APInt> & EltBits,bool AllowWholeUndefs=true,bool AllowPartialUndefs=false) getTargetConstantBitsFromNode() argument 5676 unsigned EltSizeInBits = VT.getSizeInBits() / Size; getTargetShuffleAndZeroables() local 5793 unsigned EltSizeInBits = CondVT.getScalarSizeInBits(); createShuffleMaskFromVSELECT() local 6954 unsigned EltSizeInBits = Elt.getValueSizeInBits(); EltsFromConsecutiveLoads() local 9541 isRepeatedTargetShuffleMask(unsigned LaneSizeInBits,unsigned EltSizeInBits,ArrayRef<int> Mask,SmallVectorImpl<int> & RepeatedMask) isRepeatedTargetShuffleMask() argument 10090 unsigned EltSizeInBits = VT.getScalarSizeInBits(); matchShuffleAsVTRUNC() local 10192 unsigned EltSizeInBits = VT.getScalarSizeInBits(); lowerShuffleWithVPMOV() local 10243 unsigned EltSizeInBits = VT.getScalarSizeInBits(); lowerShuffleAsVTRUNC() local 11212 unsigned EltSizeInBits = Input.getScalarValueSizeInBits(); lowerShuffleAsDecomposedShuffleMerge() local 11298 matchShuffleAsBitRotate(MVT & RotateVT,int EltSizeInBits,const X86Subtarget & Subtarget,ArrayRef<int> Mask) matchShuffleAsBitRotate() argument 18231 unsigned EltSizeInBits = EltVT.getScalarSizeInBits(); LowerINSERT_VECTOR_ELT() local 21953 unsigned EltSizeInBits = VT.getScalarSizeInBits(); LowerFCOPYSIGN() local 29200 unsigned EltSizeInBits = VT.getScalarSizeInBits(); LowerShiftByScalarImmediate() local 29481 unsigned EltSizeInBits = VT.getScalarSizeInBits(); LowerShift() local 29970 unsigned EltSizeInBits = VT.getScalarSizeInBits(); LowerFunnelShift() local 30171 unsigned EltSizeInBits = VT.getScalarSizeInBits(); LowerRotate() local 38113 unsigned EltSizeInBits = MaskVT.getScalarSizeInBits(); matchBinaryShuffle() local 38308 unsigned EltSizeInBits = MaskVT.getScalarSizeInBits(); matchBinaryPermuteShuffle() local 39385 unsigned EltSizeInBits = RootSizeInBits / Mask.size(); canonicalizeShuffleMaskWithHorizOp() local 40001 unsigned EltSizeInBits = RootSizeInBits / Mask.size(); combineX86ShufflesRecursively() local 40038 unsigned EltSizeInBits = RootSizeInBits / NumExpectedVectorElts; combineX86ShufflesRecursively() local 41081 unsigned EltSizeInBits = VT.getScalarSizeInBits(); combineTargetShuffle() local 42079 int EltSizeInBits = VT.getScalarSizeInBits(); SimplifyDemandedVectorEltsForTargetNode() local 44728 unsigned EltSizeInBits = VecSVT.getSizeInBits(); combineExtractWithShuffle() local 44956 unsigned EltSizeInBits = VecVT.getScalarSizeInBits(); combineArithReduction() local 45314 unsigned EltSizeInBits = SVT.getSizeInBits(); combineToExtendBoolVectorInReg() local 49891 int EltSizeInBits = VT.getScalarSizeInBits(); combineAnd() local 49984 unsigned EltSizeInBits = VT.getScalarSizeInBits(); canonicalizeBitSelect() local 50674 int EltSizeInBits = VT.getScalarSizeInBits(); combineOr() local 53330 unsigned EltSizeInBits = VT.getScalarSizeInBits(); combineAndnp() local 55942 unsigned EltSizeInBits = VT.getScalarSizeInBits(); combineConcatVectorOps() local [all...] |
/llvm-project/llvm/lib/IR/ |
H A D | Instructions.cpp | 2426 isBitRotateMask(ArrayRef<int> Mask,unsigned EltSizeInBits,unsigned MinSubElts,unsigned MaxSubElts,unsigned & NumSubElts,unsigned & RotateAmt) isBitRotateMask() argument
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 8494 unsigned EltSizeInBits = VT.getScalarSizeInBits(); MatchRotate() local 25137 unsigned EltSizeInBits = VT.getScalarSizeInBits(); canCombineShuffleToExtendVectorInreg() local 25210 unsigned EltSizeInBits = VT.getScalarSizeInBits(); combineShuffleToZeroExtendVectorInReg() local 25346 unsigned EltSizeInBits = VT.getScalarSizeInBits(); combineTruncationShuffle() local 26549 unsigned EltSizeInBits = VT.getScalarSizeInBits(); visitINSERT_SUBVECTOR() local [all...] |
H A D | TargetLowering.cpp | 3075 unsigned EltSizeInBits = VT.getScalarSizeInBits(); SimplifyDemandedVectorElts() local 7997 unsigned EltSizeInBits = VT.getScalarSizeInBits(); expandROT() local [all...] |
/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 6733 unsigned EltSizeInBits = DstTy.getScalarSizeInBits(); lowerRotate() local
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/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 3358 isSimpleVIDSequence(SDValue Op,unsigned EltSizeInBits) isSimpleVIDSequence() argument 4921 unsigned EltSizeInBits = VT.getScalarSizeInBits(); isLegalBitRotate() local
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