/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuilder.h | 197 CharUnits EltSize = global() variable 217 CharUnits EltSize = CharUnits::fromQuantity(DL.getTypeAllocSize(ElTy)); global() variable 233 CharUnits EltSize = global() variable 249 CharUnits EltSize = global() variable
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H A D | CGNonTrivialStruct.cpp | 196 CharUnits EltSize = Ctx.getTypeSizeInChars(EltTy); in visitArray() local 395 CharUnits EltSize = Ctx.getTypeSizeInChars(EltQT); in visitArray() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/DirectX/ |
H A D | CBufferDataLayout.cpp | 81 TypeSize EltSize = getTypeAllocSize(AT->getElementType()); in getTypeAllocSize() local 102 TypeSize EltSize = getTypeAllocSize(EltTy); in getStructLayout() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCLegalizerInfo.cpp | 33 const int EltSize = QueryTy.getElementType().getSizeInBits(); in isRegisterType() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600TargetTransformInfo.cpp | 117 unsigned EltSize = in getVectorInstrCost() local
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H A D | AMDGPULegalizerInfo.cpp | 79 const unsigned EltSize = EltTy.getSizeInBits(); in isSmallOddVector() local 130 const int EltSize = EltTy.getSizeInBits(); in moreEltsToNext32Bit() local 145 const unsigned EltSize = Ty.getElementType().getSizeInBits(); in moreElementsToNextExistingRegClass() local 231 const int EltSize = EltTy.getSizeInBits(); isRegisterVectorElementType() local 236 const int EltSize = Ty.getElementType().getSizeInBits(); isRegisterVectorType() local 423 unsigned EltSize = EltTy.getSizeInBits(); loadStoreBitcastWorkaround() local 1504 unsigned EltSize = EltTy.getSizeInBits(); AMDGPULegalizerInfo() local 1528 unsigned EltSize = EltTy.getSizeInBits(); AMDGPULegalizerInfo() local 1699 const unsigned EltSize = EltTy.getSizeInBits(); AMDGPULegalizerInfo() local 6354 unsigned EltSize = EltTy.getSizeInBits(); legalizeImageIntrinsic() local [all...] |
H A D | SIRegisterInfo.cpp | 99 unsigned EltSize = 4; member 1285 getFlatScratchSpillOpcode(const SIInstrInfo * TII,unsigned LoadStoreOp,unsigned EltSize) getFlatScratchSpillOpcode() argument 1347 unsigned EltSize = (IsFlat && !IsAGPR) ? std::min(RegWidth, 16u) : 4u; buildSpillLoadStore() local [all...] |
H A D | AMDGPURegisterBankInfo.cpp | 1035 unsigned EltSize = EltTy.getSizeInBits(); in splitUnequalType() local 1936 unsigned EltSize = VecTy.getScalarSizeInBits(); foldExtractEltToCmpSelect() local 2034 unsigned EltSize = VecTy.getScalarSizeInBits(); foldInsertEltToCmpSelect() local 4086 unsigned EltSize = getSizeInBits(MI.getOperand(2).getReg(), MRI, *TRI); getInstrMapping() local [all...] |
/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
H A D | PPC.cpp | 17 complexTempStructure(CodeGenFunction & CGF,Address VAListAddr,QualType Ty,CharUnits SlotSize,CharUnits EltSize,const ComplexType * CTy) complexTempStructure() argument 254 CharUnits EltSize = TypeInfo.Width / 2; EmitVAArg() local 915 CharUnits EltSize = TypeInfo.Width / 2; EmitVAArg() local
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H A D | LoongArch.cpp | 158 CharUnits EltSize = getContext().getTypeSizeInChars(EltTy); in detectFARsEligibleStructHelper() local
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H A D | RISCV.cpp | 164 CharUnits EltSize = getContext().getTypeSizeInChars(EltTy); in detectFPCCEligibleStructHelper() local
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H A D | AMDGPU.cpp | 75 unsigned EltSize = getContext().getTypeSize(EltTy); numRegsForType() local
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H A D | X86.cpp | 1995 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); classify() local 2297 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); BitsContainNoUserData() local 2384 unsigned EltSize = TD.getTypeAllocSize(EltTy); getFPTypeAtOffset() local 2497 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); GetINTEGERTypeAtOffset() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.h | 326 unsigned EltSize = DataTypeTy->getElementType()->getScalarSizeInBits(); in isLegalNTStoreLoad() local
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H A D | AArch64StackTagging.cpp | 278 uint32_t EltSize = DL->getTypeSizeInBits(EltTy); flatten() local
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | Analysis.cpp | 105 TypeSize EltSize = DL.getTypeAllocSize(EltTy); ComputeValueVTs() local 198 uint64_t EltSize = DL.getTypeAllocSize(EltTy).getFixedValue(); computeValueLLTs() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCTargetTransformInfo.cpp | 701 unsigned EltSize = Val->getScalarSizeInBits(); getVectorInstrCost() local 711 unsigned EltSize = Val->getScalarSizeInBits(); getVectorInstrCost() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86ShuffleDecode.cpp | 399 void DecodeEXTRQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx, in DecodeEXTRQIMask() 436 void DecodeINSERTQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx, in DecodeINSERTQIMask()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerLowering.cpp | 987 if (EltSize != 16 && EltSize != 32 && EltSize ! in matchLowerVectorFCMP() local 81 isREVMask(ArrayRef<int> M,unsigned EltSize,unsigned NumElts,unsigned BlockSize) isREVMask() argument 237 unsigned EltSize = Ty.getScalarSizeInBits(); matchREV() local [all...] |
H A D | AArch64InstructionSelector.cpp | 2593 unsigned EltSize = DstTy.getElementType().getSizeInBits(); select() local 3884 emitScalarToVector(unsigned EltSize,const TargetRegisterClass * DstRC,Register Scalar,MachineIRBuilder & MIRBuilder) const emitScalarToVector() argument 4007 getLaneCopyOpcode(unsigned & CopyOpc,unsigned & ExtractSubReg,const unsigned EltSize) getLaneCopyOpcode() argument 4364 getInsertVecEltOpInfo(const RegisterBank & RB,unsigned EltSize) getInsertVecEltOpInfo() argument 5299 unsigned EltSize = MRI.getType(EltReg).getSizeInBits(); emitLaneInsert() local 5395 unsigned EltSize = EltTy.getSizeInBits(); selectInsertElt() local 5930 unsigned EltSize = EltTy.getSizeInBits(); selectBuildVector() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizationArtifactCombiner.h | 917 isSequenceFromUnmerge(GMergeLikeInstr & MI,unsigned MergeStartIdx,GUnmerge * Unmerge,unsigned UnmergeIdxStart,unsigned NumElts,unsigned EltSize,bool AllowUndef) isSequenceFromUnmerge() argument 943 unsigned EltSize = EltTy.getSizeInBits(); tryCombineMergeLike() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 1579 unsigned EltSize = VTy->getScalarSizeInBits(); getGatherScatterOpCost() local 1676 unsigned EltSize = ValVT.getScalarSizeInBits(); getArithmeticReductionCost() local 1830 unsigned EltSize = ValVT.getScalarSizeInBits(); getMinMaxReductionCost() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineLoadStoreAlloca.cpp | 772 TypeSize EltSize = DL.getTypeAllocSize(ET); unpackLoadToAggregate() local 1294 TypeSize EltSize = DL.getTypeAllocSize(AT->getElementType()); unpackStoreToAggregate() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | Loads.cpp | 267 APInt EltSize(DL.getIndexTypeSizeInBits(Ptr->getType()), isDereferenceableAndAlignedInLoop() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 740 computeVLMAX(unsigned VectorBits,unsigned EltSize,unsigned MinSize) computeVLMAX() argument
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