| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrFoldTables.h | 25 unsigned DstOp; member
|
| H A D | X86MCInstLower.cpp | 1467 const MachineOperand &DstOp = MI->getOperand(0); printDstRegisterName() local
1901 const MachineOperand &DstOp = MI->getOperand(0); addConstantComments() local
|
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRDFOpt.cpp | 126 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
143 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
|
| /llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | 250 auto DstOp = I->getOperand(0); copyPhysReg() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 88 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local
|
| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 80 DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
81 DstOp(Register R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
82 DstOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(DstType::Ty_Reg) {} in DstOp() function
83 DstOp(const LLT T) : LLTTy(T), Ty(DstType::Ty_LLT) {} in DstOp() function
79 DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {} DstOp() function
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 60 auto *DstOp = EmitMOPS() local
|
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 258 const MachineOperand &DstOp = MI.getOperand(0); isCopyOf() local
288 const MachineOperand &DstOp = *CopyInst->Destination; isCopyOfBundle() local
|
| H A D | MachineVerifier.cpp | 1847 const MachineOperand &DstOp = MI->getOperand(0); verifyPreISelGenericInstruction() local
2166 const MachineOperand &DstOp = MI->getOperand(0); visitMachineInstrBefore() local
|
| H A D | MachineScheduler.cpp | 2091 const MachineOperand &DstOp = Copy->getOperand(0); constrainLocalCopy() local
|
| /llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 1511 Record *DstOp = Dst.getOperator(); createInstructionRenderer() local
2014 Record *DstOp = Dst.getOperator(); runOnPattern() local
|
| /llvm-project/llvm/lib/Linker/ |
| H A D | IRMover.cpp | 1297 MDNode *DstOp; linkModuleFlagsMetadata() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 672 getOpcodeForMerge(const DstOp & DstOp,ArrayRef<SrcOp> SrcOps) const getOpcodeForMerge() argument
[all...] |
| H A D | CombinerHelper.cpp | 229 Register DstOp = MI.getOperand(0).getReg(); matchFreezeOfSingleMaybePoisonOperand() local
|
| /llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 897 ResolvedDbgOp DstOp(Dst); transferMlocs() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 8492 const MCOperand &DstOp = Inst.getOperand(DstIdx); cvtVOP3DstOpSelOnly() local
|