| /llvm-project/llvm/include/llvm/Analysis/ |
| H A D | DemandedBits.h | 42 DemandedBits(Function &F, AssumptionCache &AC, DominatorTree &DT) : in DemandedBits() function
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| H A D | IVDescriptors.h | 24 class DemandedBits; variable
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| H A D | VectorUtils.h | 119 class DemandedBits; global() variable
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| /llvm-project/llvm/include/llvm/Transforms/Vectorize/ |
| H A D | SLPVectorizer.h | 33 class DemandedBits; variable
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| H A D | LoopVectorize.h | 67 class DemandedBits; global() variable
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| H A D | LoopVectorizationLegality.h | 38 class DemandedBits; variable
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 514 ShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,TargetLoweringOpt & TLO) const ShrinkDemandedConstant() argument
561 ShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,TargetLoweringOpt & TLO) const ShrinkDemandedConstant() argument
575 ShrinkDemandedOp(SDValue Op,unsigned BitWidth,const APInt & DemandedBits,TargetLoweringOpt & TLO) const ShrinkDemandedOp() argument
620 SimplifyDemandedBits(SDValue Op,const APInt & DemandedBits,DAGCombinerInfo & DCI) const SimplifyDemandedBits() argument
635 SimplifyDemandedBits(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,DAGCombinerInfo & DCI) const SimplifyDemandedBits() argument
652 SimplifyDemandedBits(SDValue Op,const APInt & DemandedBits,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth,bool AssumeSingleUse) const SimplifyDemandedBits() argument
671 SimplifyMultipleUseDemandedBits(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,SelectionDAG & DAG,unsigned Depth) const SimplifyMultipleUseDemandedBits() argument
931 SimplifyMultipleUseDemandedBits(SDValue Op,const APInt & DemandedBits,SelectionDAG & DAG,unsigned Depth) const SimplifyMultipleUseDemandedBits() argument
947 APInt DemandedBits = APInt::getAllOnes(Op.getScalarValueSizeInBits()); SimplifyMultipleUseDemandedVectorElts() local
957 combineShiftToAVG(SDValue Op,TargetLowering::TargetLoweringOpt & TLO,const TargetLowering & TLI,const APInt & DemandedBits,const APInt & DemandedElts,unsigned Depth) combineShiftToAVG() argument
1118 APInt DemandedBits = OriginalDemandedBits; SimplifyDemandedBits() local
3695 APInt DemandedBits = APInt::getAllOnes(EltSizeInBits); SimplifyDemandedVectorElts() local
3782 SimplifyDemandedBitsForTargetNode(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedBitsForTargetNode() argument
3795 SimplifyMultipleUseDemandedBitsForTargetNode(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,SelectionDAG & DAG,unsigned Depth) const SimplifyMultipleUseDemandedBitsForTargetNode() argument
[all...] |
| H A D | DAGCombiner.cpp | 333 APInt DemandedBits = APInt::getAllOnes(BitWidth); SimplifyDemandedBits() local
337 SimplifyDemandedBits(SDValue Op,const APInt & DemandedBits) SimplifyDemandedBits() argument
1373 SimplifyDemandedBits(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,bool AssumeSingleUse) SimplifyDemandedBits() argument
8238 APInt DemandedBits = APInt::getLowBitsSet(NegBits, Bits); matchRotateSub() local
8261 APInt DemandedBits = APInt::getLowBitsSet(PosBits, MaskLoBits); matchRotateSub() local
22688 APInt DemandedBits = APInt::getAllOnes(VecEltBitWidth); visitEXTRACT_VECTOR_ELT() local
[all...] |
| /llvm-project/llvm/unittests/CodeGen/ |
| H A D | AArch64SelectionDAGTest.cpp | 208 APInt DemandedBits = APInt(8, 0xFF); TEST_F() local
235 APInt DemandedBits = APInt(8, 0xFF); TEST_F() local
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 3978 targetShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,TargetLoweringOpt & TLO) targetShrinkDemandedConstant() argument
[all...] |
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 37032 targetShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,TargetLoweringOpt & TLO) const targetShrinkDemandedConstant() argument
43110 SimplifyMultipleUseDemandedBitsForTargetNode(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,SelectionDAG & DAG,unsigned Depth) const SimplifyMultipleUseDemandedBitsForTargetNode() argument
45668 APInt DemandedBits(APInt::getSignMask(BitWidth)); combineVSelectToBLENDV() local
49892 APInt DemandedBits = APInt::getAllOnes(EltSizeInBits); combineAnd() local
51362 APInt DemandedBits(APInt::getSignMask(VT.getScalarSizeInBits())); combineMaskedLoad() local
51436 APInt DemandedBits(APInt::getSignMask(VT.getScalarSizeInBits())); combineMaskedStore() local
53401 APInt DemandedBits = APInt::getAllOnes(EltSizeInBits); combineAndnp() local
55539 APInt DemandedBits = APInt::getAllOnes(OpVT.getScalarSizeInBits()); combineAddOfPMADDWD() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2163 uint64_t DemandedBits = Demanded.getZExtValue(); optimizeLogicalImm() local
2245 targetShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,TargetLoweringOpt & TLO) const targetShrinkDemandedConstant() argument
25076 APInt DemandedBits = PerformDAGCombine() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 14632 APInt DemandedBits = APInt::getBitsSet(32, 8 * Offset, 8 * Offset + 8); performCvtF32UByteNCombine() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 17645 targetShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,TargetLoweringOpt & TLO) const targetShrinkDemandedConstant() argument
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 20211 targetShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,TargetLoweringOpt & TLO) const targetShrinkDemandedConstant() argument
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