Searched defs:Demanded (Results 1 – 8 of 8) sorted by relevance
| /llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | BDCE.cpp | 118 APInt Demanded = DB.getDemandedBits(SE); in bitTrackingDCE() local
136 APInt Demanded = DB.getDemandedBits(BO); in bitTrackingDCE() local
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| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 37 ShrinkDemandedConstant(Instruction * I,unsigned OpNo,const APInt & Demanded) ShrinkDemandedConstant() argument
1479 __anon2df1ea850402(Instruction *Inst, unsigned OpNum, APInt Demanded, APInt &Undef) SimplifyDemandedVectorElts() argument
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 1192 adjustIncoming(VSETVLIInfo PrevInfo,VSETVLIInfo NewInfo,DemandedFields & Demanded) adjustIncoming() argument
1214 DemandedFields Demanded = getDemanded(MI, ST); transferBefore() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3737 APInt Demanded = APInt::getLowBitsSet(LHS.getValueSizeInBits(), 24); simplifyMul24() local
5225 APInt Demanded = APInt::getBitsSet(32, PerformDAGCombine() local
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2803 __anon826881f60202(APInt Demanded, const KnownBits &KnownRHS) SimplifyDemandedBits() argument
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| H A D | DAGCombiner.cpp | 25969 APInt &Demanded = M < (int)NumElts ? DemandedLHS : DemandedRHS; visitVECTOR_SHUFFLE() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 20237 unsigned Demanded = DemandedBits.getZExtValue(); targetShrinkDemandedConstant() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2150 optimizeLogicalImm(SDValue Op,unsigned Size,uint64_t Imm,const APInt & Demanded,TargetLowering::TargetLoweringOpt & TLO,unsigned NewOpc) optimizeLogicalImm() argument
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