/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.cpp | 24 static SDValue createMemMemNode(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in createMemMemNode() 41 static SDValue emitMemMemImm(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in emitMemMemImm() 50 static SDValue emitMemMemReg(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, in emitMemMemReg() 61 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy() 77 static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, in memsetStore() 89 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, in EmitTargetCodeForMemset() 162 static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg, in addIPMSequence() 173 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForMemcmp() 189 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, in EmitTargetCodeForMemchr() 215 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, in EmitTargetCodeForStrcpy() [all …]
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/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuilder.h | 175 const llvm::DataLayout &DL = BB->getParent()->getParent()->getDataLayout(); global() variable 196 const llvm::DataLayout &DL = BB->getParent()->getParent()->getDataLayout(); global() variable 216 const llvm::DataLayout &DL = BB->getParent()->getParent()->getDataLayout(); global() variable 232 const llvm::DataLayout &DL = BB->getParent()->getParent()->getDataLayout(); global() variable 248 const llvm::DataLayout &DL = BB->getParent()->getParent()->getDataLayout(); global() variable 281 const llvm::DataLayout &DL = BB->getParent()->getParent()->getDataLayout(); global() variable 345 const llvm::DataLayout &DL = BB->getParent()->getParent()->getDataLayout(); CreatePreserveStructAccessIndex() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | VNCoercion.cpp | 19 const DataLayout &DL) { in canCoerceMustAliasedValueToLoad() 78 const DataLayout &DL) { in coerceAvailableValueToLoadType() 176 const DataLayout &DL) { in analyzeLoadFromClobberingWrite() 212 StoreInst *DepSI, const DataLayout &DL) { in analyzeLoadFromClobberingStore() 233 const DataLayout &DL) { in analyzeLoadFromClobberingLoad() 247 MemIntrinsic *MI, const DataLayout &DL) { in analyzeLoadFromClobberingMemInst() 295 const DataLayout &DL) { in getStoreValueForLoadHelper() 336 Instruction *InsertPt, const DataLayout &DL) { in getValueForLoad() 349 Type *LoadTy, const DataLayout &DL) { in getConstantValueForLoad() 362 const DataLayout &DL) { in getMemInstValueForLoad() [all …]
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/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | MemoryLocation.cpp | 37 const auto &DL = LI->getDataLayout(); in get() local 46 const auto &DL = SI->getDataLayout(); in get() local 60 const auto &DL = CXI->getDataLayout(); in get() local 69 const auto &DL = RMWI->getDataLayout(); in get() local 168 const DataLayout &DL = II->getDataLayout(); in getForArgument() local [all...] |
H A D | Loads.cpp | 30 const DataLayout &DL) { in isAligned() argument 38 const Value *V, Align Alignment, const APInt &Size, const DataLayout &DL, in isDereferenceableAndAlignedPointer() argument 186 isDereferenceableAndAlignedPointer(const Value * V,Align Alignment,const APInt & Size,const DataLayout & DL,const Instruction * CtxI,AssumptionCache * AC,const DominatorTree * DT,const TargetLibraryInfo * TLI) isDereferenceableAndAlignedPointer() argument 200 isDereferenceableAndAlignedPointer(const Value * V,Type * Ty,Align Alignment,const DataLayout & DL,const Instruction * CtxI,AssumptionCache * AC,const DominatorTree * DT,const TargetLibraryInfo * TLI) isDereferenceableAndAlignedPointer() argument 220 isDereferenceablePointer(const Value * V,Type * Ty,const DataLayout & DL,const Instruction * CtxI,AssumptionCache * AC,const DominatorTree * DT,const TargetLibraryInfo * TLI) isDereferenceablePointer() argument 264 auto &DL = LI->getModule()->getDataLayout(); isDereferenceableAndAlignedInLoop() local 351 isSafeToLoadUnconditionally(Value * V,Align Alignment,APInt & Size,const DataLayout & DL,Instruction * ScanFrom,AssumptionCache * AC,const DominatorTree * DT,const TargetLibraryInfo * TLI) isSafeToLoadUnconditionally() argument 428 isSafeToLoadUnconditionally(Value * V,Type * Ty,Align Alignment,const DataLayout & DL,Instruction * ScanFrom,AssumptionCache * AC,const DominatorTree * DT,const TargetLibraryInfo * TLI) isSafeToLoadUnconditionally() argument 474 areNonOverlapSameBaseLoadAndStore(const Value * LoadPtr,Type * LoadTy,const Value * StorePtr,Type * StoreTy,const DataLayout & DL) areNonOverlapSameBaseLoadAndStore() argument 494 getAvailableLoadStore(Instruction * Inst,const Value * Ptr,Type * AccessTy,bool AtLeastAtomic,const DataLayout & DL,bool * IsLoadCSE) getAvailableLoadStore() argument 589 const DataLayout &DL = ScanBB->getModule()->getDataLayout(); findAvailablePtrLoadStore() local 669 const DataLayout &DL = Load->getModule()->getDataLayout(); FindAvailableLoadedValue() local 711 canReplacePointersIfEqual(Value * A,Value * B,const DataLayout & DL,Instruction * CtxI) canReplacePointersIfEqual() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelDAGToDAG.cpp | 106 SDLoc DL(Addr); INITIALIZE_PASS() local 140 SDLoc DL(Addr); SelectFIAddr() local 174 SDLoc DL(Op); SelectInlineAsmMemoryOperand() local 201 SDLoc DL(Node); Select() local 243 SDLoc DL(Node); PreprocessLoad() local 339 const DataLayout &DL = CurDAG->getDataLayout(); getConstantFieldValue() local 381 fillGenericConstant(const DataLayout & DL,const Constant * CV,val_vec_type & Vals,uint64_t Offset) fillGenericConstant() argument 418 fillConstantDataArray(const DataLayout & DL,const ConstantDataArray * CDA,val_vec_type & Vals,int Offset) fillConstantDataArray() argument 431 fillConstantArray(const DataLayout & DL,const ConstantArray * CA,val_vec_type & Vals,int Offset) fillConstantArray() argument 443 fillConstantStruct(const DataLayout & DL,const ConstantStruct * CS,val_vec_type & Vals,int Offset) fillConstantStruct() argument [all...] |
H A D | BPFISelLowering.cpp | 40 static void fail(const SDLoc &DL, SelectionDAG &DAG, const Twine &Msg, in fail() argument 297 SDLoc DL(N); ReplaceNodeResults() local 326 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 538 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 584 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument 627 SDLoc DL(Op); LowerSDIVSREM() local 635 SDLoc DL(Op); LowerDYNAMIC_STACKALLOC() local 647 SDLoc DL(Op); LowerBR_CC() local 662 SDLoc DL(Op); LowerSELECT_CC() local 701 SDLoc DL(Op); LowerGlobalAddress() local 715 DebugLoc DL = MI.getDebugLoc(); EmitSubregExt() local 775 DebugLoc DL = MI.getDebugLoc(); EmitInstrWithCustomInserter() local 914 getScalarShiftAmountTy(const DataLayout & DL,EVT VT) const getScalarShiftAmountTy() argument 919 isLegalAddressingMode(const DataLayout & DL,const AddrMode & AM,Type * Ty,unsigned AS,Instruction * I) const isLegalAddressingMode() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCMachineFunctionInfo.cpp | 35 const DataLayout &DL = MF.getDataLayout(); in getPICOffsetSymbol() local 42 const DataLayout &DL = MF.getDataLayout(); in getGlobalEPSymbol() local 49 const DataLayout &DL = MF.getDataLayout(); in getLocalEPSymbol() local 56 const DataLayout &DL = MF.getDataLayout(); in getTOCOffsetSymbol() local
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/freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
H A D | Mangler.cpp | 35 getNameWithPrefixImpl(raw_ostream & OS,const Twine & GVName,ManglerPrefixTy PrefixTy,const DataLayout & DL,char Prefix) getNameWithPrefixImpl() argument 63 getNameWithPrefixImpl(raw_ostream & OS,const Twine & GVName,const DataLayout & DL,ManglerPrefixTy PrefixTy) getNameWithPrefixImpl() argument 70 getNameWithPrefix(raw_ostream & OS,const Twine & GVName,const DataLayout & DL) getNameWithPrefix() argument 75 getNameWithPrefix(SmallVectorImpl<char> & OutName,const Twine & GVName,const DataLayout & DL) getNameWithPrefix() argument 95 addByteCountSuffix(raw_ostream & OS,const Function * F,const DataLayout & DL) addByteCountSuffix() argument 130 const DataLayout &DL = GV->getParent()->getDataLayout(); getNameWithPrefix() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | IntrinsicLowering.h | 23 const DataLayout &DL; variable 28 explicit IntrinsicLowering(const DataLayout &DL) : DL(DL) {} in IntrinsicLowering()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 47 const DebugLoc &DL, in BuildCFI() argument 59 const DebugLoc &DL, bool IsPrologue) const { in emitCalleeSavedFrameMoves() argument 93 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); emitPrologue() local 203 DebugLoc DL = MBBI->getDebugLoc(); emitEpilogue() local 322 DebugLoc DL; spillCalleeSavedRegisters() local 347 DebugLoc DL; restoreCalleeSavedRegisters() local 413 DebugLoc DL = I->getDebugLoc(); eliminateCallFramePseudoInstr() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelDAGToDAG.cpp | 77 auto DL = CurDAG->getDataLayout(); SelectAddr() local 214 auto DL = CurDAG->getDataLayout(); SelectInlineAsmMemoryOperand() local 307 auto DL = CurDAG->getDataLayout(); select() local 341 SDLoc DL(N); select() local 379 SDLoc DL(N); select() local 461 SDLoc DL(N); select() local 489 SDLoc DL(N); select() local 501 SDLoc DL(N); selectMultiplication() local 563 SDLoc DL(N); trySelect() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | BasicAliasAnalysis.h | 42 const DataLayout &DL; variable 58 : DL(DL), F(F), TLI(TLI), AC(AC), DT_(DT) {} in DL() argument
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H A D | SimplifyQuery.h | 61 const DataLayout &DL; global() member 79 : DL(DL), CxtI(CXTI) {} DL() function 86 : DL(DL), TLI(TLI), DT(DT), AC(AC), CxtI(CXTI), DC(DC), IIQ(UseInstrInfo), DL() function 93 : DL(DL), DT(DT), AC(AC), CxtI(CXTI), IIQ(UseInstrInfo), DL() function [all...] |
H A D | ObjCARCAliasAnalysis.h | 38 const DataLayout &DL; variable 41 explicit ObjCARCAAResult(const DataLayout &DL) : DL(DL) {} in ObjCARCAAResult()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 406 SDLoc DL(Op); lowerSELECT() local 785 genConstMult(SDValue X,APInt C,const SDLoc & DL,EVT VT,EVT ShiftTy,SelectionDAG & DAG) genConstMult() argument 857 SDLoc DL(N); performDSPShiftCombine() local 1173 SDLoc DL(Op); lowerLOAD() local 1202 SDLoc DL(Op); lowerSTORE() local 1226 SDLoc DL(Op); lowerBITCAST() local 1260 SDLoc DL(Op); lowerMulDiv() local 1277 initAccumulator(SDValue In,const SDLoc & DL,SelectionDAG & DAG) initAccumulator() argument 1283 extractLOHI(SDValue Op,const SDLoc & DL,SelectionDAG & DAG) extractLOHI() argument 1302 SDLoc DL(Op); lowerDSPIntr() local 1350 SDLoc DL(Op); lowerMSACopyIntr() local 1366 SDLoc DL(Op); lowerMSASplatZExt() local 1420 SDLoc DL(SplatValue); getBuildVectorSplat() local 1456 SDLoc DL(Op); lowerMSABinaryBitImmIntr() local 1496 SDLoc DL(Op); truncateVecElts() local 1510 SDLoc DL(Op); lowerMSABitClear() local 1519 SDLoc DL(Op); lowerMSABitClearImm() local 1530 SDLoc DL(Op); lowerINTRINSIC_WO_CHAIN() local 2283 SDLoc DL(Op); lowerMSALoadIntr() local 2357 SDLoc DL(Op); lowerMSAStoreIntr() local 2399 SDLoc DL(Op); lowerEXTRACT_VECTOR_ELT() local 2451 SDLoc DL(Op); lowerBUILD_VECTOR() local 2585 SDLoc DL(Op); lowerVECTOR_SHUFFLE_SHF() local 2931 SDLoc DL(Op); lowerVECTOR_SHUFFLE_VSHF() local 3026 DebugLoc DL = MI.getDebugLoc(); emitBPOSGE32() local 3095 DebugLoc DL = MI.getDebugLoc(); emitMSACBranchPseudo() local 3160 DebugLoc DL = MI.getDebugLoc(); emitCOPY_FW() local 3209 DebugLoc DL = MI.getDebugLoc(); emitCOPY_FD() local 3235 DebugLoc DL = MI.getDebugLoc(); emitINSERT_FW() local 3271 DebugLoc DL = MI.getDebugLoc(); emitINSERT_FD() local 3317 DebugLoc DL = MI.getDebugLoc(); emitINSERT_DF_VIDX() local 3431 DebugLoc DL = MI.getDebugLoc(); emitFILL_FW() local 3466 DebugLoc DL = MI.getDebugLoc(); emitFILL_FD() local 3500 DebugLoc DL = MI.getDebugLoc(); emitST_F16_PSEUDO() local 3555 DebugLoc DL = MI.getDebugLoc(); emitLD_F16_PSEUDO() local 3649 DebugLoc DL = MI.getDebugLoc(); emitFPROUND_PSEUDO() local 3754 DebugLoc DL = MI.getDebugLoc(); emitFPEXTEND_PSEUDO() local 3811 DebugLoc DL = MI.getDebugLoc(); emitFEXP2_W_1() local 3840 DebugLoc DL = MI.getDebugLoc(); emitFEXP2_D_1() local [all...] |
H A D | Mips16InstrInfo.cpp | 71 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg() argument 112 DebugLoc DL; in storeRegToStack() local 130 DebugLoc DL; in loadRegFromStack() local 213 DebugLoc DL; in makeFrame() local 243 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); restoreFrame() local 279 DebugLoc DL; adjustStackPtrBig() local 323 loadImmediate(unsigned FrameReg,int64_t Imm,MachineBasicBlock & MBB,MachineBasicBlock::iterator II,const DebugLoc & DL,unsigned & NewImm) const loadImmediate() argument 462 DebugLoc DL; BuildAddiuSpImm() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEFrameLowering.cpp | 141 DebugLoc DL; in emitPrologueInsns() local 189 DebugLoc DL; in emitEpilogueInsns() local 231 DebugLoc DL; in emitSPAdjustment() local 276 DebugLoc DL; in emitSPExtend() local 320 DebugLoc DL; in emitPrologue() local 395 DebugLoc DL; in emitEpilogue() local
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H A D | VEISelLowering.cpp | 371 const SDLoc &DL, SelectionDAG &DAG) const { in LowerReturn() argument 443 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments() argument 584 SDLoc DL = CLI.DL; LowerCall() local 1004 SDLoc DL(Op); makeHiLoPair() local 1014 SDLoc DL(Op); makeAddress() local 1103 SDLoc DL(Op); lowerATOMIC_FENCE() local 1161 SDLoc DL(Op); prepareTS1AM() local 1183 SDLoc DL(Op); finalizeTS1AM() local 1197 SDLoc DL(Op); lowerATOMIC_SWAP() local 1274 SDLoc DL(Op); lowerToTLSGeneralDynamicModel() local 1325 SDLoc DL(Op); lowerLoadF128() local 1370 SDLoc DL(Op); lowerLoadI1() local 1454 SDLoc DL(Op); lowerStoreF128() local 1495 SDLoc DL(Op); lowerStoreI1() local 1576 SDLoc DL(Op); lowerVASTART() local 1592 SDLoc DL(Node); lowerVAARG() local 1644 SDLoc DL(Op); lowerDYNAMIC_STACKALLOC() local 1705 SDLoc DL(Op); lowerEH_SJLJ_LONGJMP() local 1712 SDLoc DL(Op); lowerEH_SJLJ_SETJMP() local 1720 SDLoc DL(Op); lowerEH_SJLJ_SETUP_DISPATCH() local 1728 SDLoc DL(Op); lowerFRAMEADDR() local 1758 SDLoc DL(Op); lowerRETURNADDR() local 1768 SDLoc DL(Op); lowerINTRINSIC_WO_CHAIN() local 2000 SDLoc DL(Table); getPICJumpTableRelocBase() local 2073 prepareSymbol(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,StringRef Symbol,const DebugLoc & DL,bool IsLocal=false,bool IsCall=false) const prepareSymbol() argument 2163 DebugLoc DL = MI.getDebugLoc(); setupEntryBlockForSjLj() local 2179 DebugLoc DL = MI.getDebugLoc(); emitEHSjLjSetJmp() local 2310 DebugLoc DL = MI.getDebugLoc(); emitEHSjLjLongJmp() local 2377 DebugLoc DL = MI.getDebugLoc(); emitSjLjDispatchBlock() local 2778 generateComparison(EVT VT,SDValue LHS,SDValue RHS,ISD::CondCode CC,bool WithCMov,const SDLoc & DL,SelectionDAG & DAG) generateComparison() argument 2817 SDLoc DL(N); combineSelect() local 2881 SDLoc DL(N); combineSelectCC() local 2996 SDLoc DL(N); combineTRUNCATE() local 3135 SDLoc DL(Op); lowerEXTRACT_VECTOR_ELT() local 3183 SDLoc DL(Op); lowerINSERT_VECTOR_ELT() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 454 SDLoc DL(Op); lowerBUILD_VECTOR() local 552 SDLoc DL(Op); lowerATOMIC_FENCE() local 596 SDLoc DL(Op); lowerFRAMEADDR() local 647 SDLoc DL(Op); lowerVASTART() local 663 SDLoc DL(Op); lowerUINT_TO_FP() local 697 SDLoc DL(Op); lowerSINT_TO_FP() local 720 SDLoc DL(Op); lowerBITCAST() local 734 SDLoc DL(Op); lowerFP_TO_SINT() local 748 getTargetNode(GlobalAddressSDNode * N,SDLoc DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 753 getTargetNode(BlockAddressSDNode * N,SDLoc DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 759 getTargetNode(ConstantPoolSDNode * N,SDLoc DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 765 getTargetNode(JumpTableSDNode * N,SDLoc DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 774 SDLoc DL(N); getAddr() local 854 SDLoc DL(N); getStaticTLSAddr() local 875 SDLoc DL(N); getDynamicTLSAddr() local 974 SDLoc DL(Op); lowerINTRINSIC_WO_CHAIN() local 1263 SDLoc DL(Op); lowerINTRINSIC_W_CHAIN() local 1384 SDLoc DL(Op); lowerINTRINSIC_VOID() local 1550 SDLoc DL(Op); lowerShiftLeftParts() local 1590 SDLoc DL(Op); lowerShiftRightParts() local 1670 SDLoc DL(N); customLegalizeToWOp() local 1720 SDLoc DL(Node); replaceVPICKVE2GRResults() local 1736 SDLoc DL(N); replaceVecCondBranchResults() local 1814 SDLoc DL(N); ReplaceNodeResults() local 2108 SDLoc DL(N); performANDCombine() local 2199 SDLoc DL(N); performSRLCombine() local 2232 SDLoc DL(N); performORCombine() local 2465 SDLoc DL(Node); legalizeIntrinsicImmArg() local 2480 SDLoc DL(Node); lowerVectorSplatImm() local 2498 SDLoc DL(Node); truncateVecElts() local 2506 SDLoc DL(Node); lowerVectorBitClear() local 2518 SDLoc DL(Node); lowerVectorBitClearImm() local 2536 SDLoc DL(Node); lowerVectorBitSetImm() local 2553 SDLoc DL(Node); lowerVectorBitRevImm() local 2572 SDLoc DL(N); performINTRINSIC_WO_CHAINCombine() local 3108 DebugLoc DL = MI.getDebugLoc(); insertDivByZeroTrap() local 3202 DebugLoc DL = MI.getDebugLoc(); emitVecCondBranchPseudo() local 3276 DebugLoc DL = MI.getDebugLoc(); emitPseudoXVINSGR2VR() local 3324 DebugLoc DL = MI.getDebugLoc(); EmitInstrWithCustomInserter() local 3534 CC_LoongArch(const DataLayout & DL,LoongArchABI::ABI ABI,unsigned ValNo,MVT ValVT,CCValAssign::LocInfo LocInfo,ISD::ArgFlagsTy ArgFlags,CCState & State,bool IsFixed,bool IsRet,Type * OrigTy) CC_LoongArch() argument 3730 convertLocVTToValVT(SelectionDAG & DAG,SDValue Val,const CCValAssign & VA,const SDLoc & DL) convertLocVTToValVT() argument 3748 unpackFromRegLoc(SelectionDAG & DAG,SDValue Chain,const CCValAssign & VA,const SDLoc & DL,const LoongArchTargetLowering & TLI) unpackFromRegLoc() argument 3765 unpackFromMemLoc(SelectionDAG & DAG,SDValue Chain,const CCValAssign & VA,const SDLoc & DL) unpackFromMemLoc() argument 3790 convertValVTToLocVT(SelectionDAG & DAG,SDValue Val,const CCValAssign & VA,const SDLoc & DL) convertValVTToLocVT() argument 3853 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 4071 SDLoc &DL = CLI.DL; LowerCall() local 4342 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 4417 getSetCCResultType(const DataLayout & DL,LLVMContext & Context,EVT VT) const getSetCCResultType() argument 4588 const DataLayout &DL = AI->getModule()->getDataLayout(); emitMaskedAtomicRMWIntrinsic() local 4866 isLegalAddressingMode(const DataLayout & DL,const AddrMode & AM,Type * Ty,unsigned AS,Instruction * I) const isLegalAddressingMode() argument [all...] |
H A D | LoongArchExpandAtomicPseudoInsts.cpp | 147 MachineInstr &MI, DebugLoc DL, in doAtomicBinOpExpansion() 218 static void insertMaskedMerge(const LoongArchInstrInfo *TII, DebugLoc DL, in insertMaskedMerge() 239 const LoongArchInstrInfo *TII, MachineInstr &MI, DebugLoc DL, in doMaskedAtomicBinOpExpansion() 305 DebugLoc DL = MI.getDebugLoc(); in expandAtomicBinOp() local 338 static void insertSext(const LoongArchInstrInfo *TII, DebugLoc DL, in insertSext() 358 DebugLoc DL = MI.getDebugLoc(); in expandAtomicMinMaxOp() local 473 DebugLoc DL = MI.getDebugLoc(); in expandAtomicCmpXchg() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 365 getPointerTy(const DataLayout & DL,uint32_t AS) const getPointerTy() argument 374 getPointerMemTy(const DataLayout & DL,uint32_t AS) const getPointerMemTy() argument 448 LowerFPToInt(MachineInstr & MI,DebugLoc DL,MachineBasicBlock * BB,const TargetInstrInfo & TII,bool IsUnsigned,bool Int64,bool Float64,unsigned LoweredOpcode) LowerFPToInt() argument 542 LowerCallResults(MachineInstr & CallResults,DebugLoc DL,MachineBasicBlock * BB,const WebAssemblySubtarget * Subtarget,const TargetInstrInfo & TII) LowerCallResults() argument 683 DebugLoc DL = MI.getDebugLoc(); EmitInstrWithCustomInserter() local 783 isLegalAddressingMode(const DataLayout & DL,const AddrMode & AM,Type * Ty,unsigned AS,Instruction * I) const isLegalAddressingMode() argument 861 getSetCCResultType(const DataLayout & DL,LLVMContext & C,EVT VT) const getSetCCResultType() argument 985 fail(const SDLoc & DL,SelectionDAG & DAG,const char * Msg) fail() argument 1010 SDLoc DL = CLI.DL; LowerCall() local 1297 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 1326 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 1431 SDLoc DL(Op); LowerOperation() local 1515 SDLoc DL(Op); LowerStore() local 1553 SDLoc DL(Op); LowerLoad() local 1601 SDLoc DL(Op); LowerCopyToReg() local 1625 SDLoc DL(Op); LowerRETURNADDR() local 1662 SDLoc DL(Op); LowerGlobalTLSAddress() local 1718 SDLoc DL(Op); LowerGlobalAddress() local 1765 SDLoc DL(Op); LowerExternalSymbol() local 1786 SDLoc DL(Op); LowerBR_JT() local 1812 SDLoc DL(Op); LowerVASTART() local 1839 SDLoc DL(Op); LowerIntrinsic() local 1887 SDLoc DL(Op); LowerSIGN_EXTEND_INREG() local 1930 SDLoc DL(Op); LowerEXTEND_VECTOR_INREG() local 1970 SDLoc DL(Op); LowerConvertLow() local 2039 SDLoc DL(Op); LowerBUILD_VECTOR() local 2285 SDLoc DL(Op); LowerVECTOR_SHUFFLE() local 2313 SDLoc DL(Op); LowerSETCC() local 2353 SDLoc DL(Op); unrollVectorShift() local 2377 SDLoc DL(Op); LowerShift() local 2442 SDLoc DL(Op); LowerFP_TO_INT_SAT() local 2680 extractSubVector(SDValue Vec,unsigned IdxVal,SelectionDAG & DAG,const SDLoc & DL,unsigned VectorWidth) extractSubVector() argument 2708 truncateVectorWithNARROW(EVT DstVT,SDValue In,const SDLoc & DL,SelectionDAG & DAG) truncateVectorWithNARROW() argument 2779 SDLoc DL(N); performTruncateCombine() local 2789 SDLoc DL(N); performBitcastCombine() local 2820 SDLoc DL(N); performSETCCCombine() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 1418 getSetCCResultType(const DataLayout & DL,LLVMContext & Context,EVT VT) const getSetCCResultType() argument 1464 auto &DL = I.getModule()->getDataLayout(); getTgtMemIntrinsic() local 1724 isLegalAddressingMode(const DataLayout & DL,const AddrMode & AM,Type * Ty,unsigned AS,Instruction * I) const isLegalAddressingMode() argument 2220 translateSetCCForBranch(const SDLoc & DL,SDValue & LHS,SDValue & RHS,ISD::CondCode & CC,SelectionDAG & DAG) translateSetCCForBranch() argument 2562 SDLoc DL(V); convertToScalableVector() local 2574 SDLoc DL(V); convertFromScalableVector() local 2590 getAllOnesMask(MVT VecVT,SDValue VL,const SDLoc & DL,SelectionDAG & DAG) getAllOnesMask() argument 2596 getVLOp(uint64_t NumElts,MVT ContainerVT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getVLOp() argument 2610 getDefaultScalableVLOps(MVT VecVT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getDefaultScalableVLOps() argument 2619 getDefaultVLOps(uint64_t NumElts,MVT ContainerVT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getDefaultVLOps() argument 2632 getDefaultVLOps(MVT VecVT,MVT ContainerVT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getDefaultVLOps() argument 2641 computeVLMax(MVT VecVT,const SDLoc & DL,SelectionDAG & DAG) const computeVLMax() argument 2762 SDLoc DL(Op); lowerFP_TO_INT_SAT() local 2802 SDLoc DL(Op); lowerFP_TO_INT_SAT() local 2873 SDLoc DL(Op); lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND() local 2979 SDLoc DL(Op); lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND() local 3087 SDLoc DL(Op); lowerFTRUNC_FCEIL_FFLOOR_FROUND() local 3111 SDLoc DL(Op); lowerVectorXRINT() local 3132 getVSlidedown(SelectionDAG & DAG,const RISCVSubtarget & Subtarget,const SDLoc & DL,EVT VT,SDValue Merge,SDValue Op,SDValue Offset,SDValue Mask,SDValue VL,unsigned Policy=RISCVII::TAIL_UNDISTURBED_MASK_UNDISTURBED) getVSlidedown() argument 3143 getVSlideup(SelectionDAG & DAG,const RISCVSubtarget & Subtarget,const SDLoc & DL,EVT VT,SDValue Merge,SDValue Op,SDValue Offset,SDValue Mask,SDValue VL,unsigned Policy=RISCVII::TAIL_UNDISTURBED_MASK_UNDISTURBED) getVSlideup() argument 3303 matchSplatAsGather(SDValue SplatVal,MVT VT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) matchSplatAsGather() argument 3352 SDLoc DL(Op); lowerBuildVectorViaDominantValues() local 3459 SDLoc DL(Op); lowerBuildVectorOfConstants() local 3764 SDLoc DL(Op); lowerBUILD_VECTOR() local 3929 splatPartsI64WithVL(const SDLoc & DL,MVT VT,SDValue Passthru,SDValue Lo,SDValue Hi,SDValue VL,SelectionDAG & DAG) splatPartsI64WithVL() argument 3986 splatSplitI64WithVL(const SDLoc & DL,MVT VT,SDValue Passthru,SDValue Scalar,SDValue VL,SelectionDAG & DAG) splatSplitI64WithVL() argument 3999 lowerScalarSplat(SDValue Passthru,SDValue Scalar,SDValue VL,MVT VT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) lowerScalarSplat() argument 4037 lowerScalarInsert(SDValue Scalar,SDValue VL,MVT VT,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) lowerScalarInsert() argument 4251 getDeinterleaveViaVNSRL(const SDLoc & DL,MVT VT,SDValue Src,bool EvenElts,const RISCVSubtarget & Subtarget,SelectionDAG & DAG) getDeinterleaveViaVNSRL() argument 4310 lowerVECTOR_SHUFFLEAsVSlidedown(const SDLoc & DL,MVT VT,SDValue V1,SDValue V2,ArrayRef<int> Mask,const RISCVSubtarget & Subtarget,SelectionDAG & DAG) lowerVECTOR_SHUFFLEAsVSlidedown() argument 4387 lowerVECTOR_SHUFFLEAsVSlideup(const SDLoc & DL,MVT VT,SDValue V1,SDValue V2,ArrayRef<int> Mask,const RISCVSubtarget & Subtarget,SelectionDAG & DAG) lowerVECTOR_SHUFFLEAsVSlideup() argument 4431 lowerVECTOR_SHUFFLEAsVSlide1(const SDLoc & DL,MVT VT,SDValue V1,SDValue V2,ArrayRef<int> Mask,const RISCVSubtarget & Subtarget,SelectionDAG & DAG) lowerVECTOR_SHUFFLEAsVSlide1() argument 4486 getWideningInterleave(SDValue EvenV,SDValue OddV,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getWideningInterleave() argument 4572 SDLoc DL(SVN); lowerBitreverseShuffle() local 4627 SDLoc DL(SVN); lowerVECTOR_SHUFFLEAsRotate() local 4663 SDLoc DL(SVN); lowerShuffleViaVRegSplitting() local 4740 SDLoc DL(Op); lowerVECTOR_SHUFFLE() local 5121 SDLoc DL(Op); lowerCTLZ_CTTZ_ZERO_UNDEF() local 5246 SDLoc DL(Op); expandUnalignedRVVLoad() local 5276 SDLoc DL(Op); expandUnalignedRVVStore() local 5363 SDLoc DL(Op); LowerIS_FPCLASS() local 5465 SDLoc DL(Op); lowerFMAXIMUM_FMINIMUM() local 5731 SDLoc DL(Op); SplitVectorOp() local 5757 SDLoc DL(Op); SplitVPOp() local 5786 SDLoc DL(Op); SplitVectorReductionOp() local 5809 SDLoc DL(Op); SplitStrictFPVectorOp() local 5884 SDLoc DL(Op); LowerOperation() local 5973 SDLoc DL(Op); LowerOperation() local 6004 SDLoc DL(Op); LowerOperation() local 6025 SDLoc DL(Op); LowerOperation() local 6062 SDLoc DL(Op); LowerOperation() local 6079 SDLoc DL(Op); LowerOperation() local 6096 SDLoc DL(Op); LowerOperation() local 6126 SDLoc DL(Op); LowerOperation() local 6145 SDLoc DL(Op); LowerOperation() local 6163 SDLoc DL(Op); LowerOperation() local 6297 SDLoc DL(Op); LowerOperation() local 6310 SDLoc DL(Op); LowerOperation() local 6326 SDLoc DL(Op); LowerOperation() local 6340 SDLoc DL(Op); LowerOperation() local 6426 SDLoc DL(Op); LowerOperation() local 6444 SDLoc DL(Op); LowerOperation() local 6490 SDLoc DL(Op); LowerOperation() local 6505 SDLoc DL(Op); LowerOperation() local 6697 SDLoc DL(Op); LowerOperation() local 6716 SDLoc DL(Op); LowerOperation() local 6782 getTargetNode(GlobalAddressSDNode * N,const SDLoc & DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 6787 getTargetNode(BlockAddressSDNode * N,const SDLoc & DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 6793 getTargetNode(ConstantPoolSDNode * N,const SDLoc & DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 6799 getTargetNode(JumpTableSDNode * N,const SDLoc & DL,EVT Ty,SelectionDAG & DAG,unsigned Flags) getTargetNode() argument 6807 SDLoc DL(N); getAddr() local 6907 SDLoc DL(N); getStaticTLSAddr() local 6953 SDLoc DL(N); getDynamicTLSAddr() local 6985 SDLoc DL(N); getTLSDescAddr() local 7064 SDLoc DL(N); combineSelectToBinOp() local 7155 SDLoc DL(Sel); foldBinOpIntoSelectIfProfitable() local 7186 SDLoc DL(Op); lowerSELECT() local 7338 SDLoc DL(Op); lowerBRCOND() local 7363 SDLoc DL(Op); lowerVASTART() local 7384 SDLoc DL(Op); lowerFRAMEADDR() local 7410 SDLoc DL(Op); lowerRETURNADDR() local 7429 SDLoc DL(Op); lowerShiftLeftParts() local 7468 SDLoc DL(Op); lowerShiftRightParts() local 7522 SDLoc DL(Op); lowerVectorMaskSplat() local 7548 SDLoc DL(Op); lowerSPLAT_VECTOR_PARTS() local 7578 SDLoc DL(Op); lowerVectorMaskExt() local 7633 SDLoc DL(Op); lowerFixedLengthVectorExtendToRVV() local 7647 SDLoc DL(Op); lowerVectorMaskTruncLike() local 7699 SDLoc DL(Op); lowerVectorTruncLike() local 7761 SDLoc DL(Op); lowerStrictFPExtendOrRoundLike() local 7815 SDLoc DL(Op); lowerVectorFPExtendOrRoundLike() local 7880 getSmallestVTForIndex(MVT VecVT,unsigned MaxIdx,SDLoc DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) getSmallestVTForIndex() argument 7908 SDLoc DL(Op); lowerINSERT_VECTOR_ELT() local 8077 SDLoc DL(Op); lowerEXTRACT_VECTOR_ELT() local 8242 SDLoc DL(Op); lowerVectorIntrinsicScalars() local 8438 SDLoc DL(N); lowerGetVectorLength() local 8453 SDLoc DL(Op); getVCIXOperands() local 8484 SDLoc DL(Op); LowerINTRINSIC_WO_CHAIN() local 8737 SDLoc DL(Op); LowerINTRINSIC_W_CHAIN() local 8813 SDLoc DL(Op); LowerINTRINSIC_W_CHAIN() local 8861 SDLoc DL(Op); LowerINTRINSIC_W_CHAIN() local 8901 SDLoc DL(Op); LowerINTRINSIC_VOID() local 8948 SDLoc DL(Op); LowerINTRINSIC_VOID() local 9092 SDLoc DL(Op); lowerVectorMaskVecReduction() local 9182 lowerReductionSeq(unsigned RVVOpcode,MVT ResVT,SDValue StartValue,SDValue Vec,SDValue Mask,SDValue VL,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) lowerReductionSeq() argument 9212 SDLoc DL(Op); lowerVECREDUCE() local 9266 SDLoc DL(Op); getRVVFPReductionOpAndOperands() local 9297 SDLoc DL(Op); lowerFPVECREDUCE() local 9319 SDLoc DL(Op); lowerVPREDUCE() local 9349 SDLoc DL(Op); lowerINSERT_SUBVECTOR() local 9526 SDLoc DL(Op); lowerEXTRACT_SUBVECTOR() local 9657 widenVectorOpsToi8(SDValue N,const SDLoc & DL,SelectionDAG & DAG) widenVectorOpsToi8() argument 9687 SDLoc DL(Op); lowerVECTOR_DEINTERLEAVE() local 9764 SDLoc DL(Op); lowerVECTOR_INTERLEAVE() local 9855 SDLoc DL(Op); lowerSTEP_VECTOR() local 9885 SDLoc DL(Op); lowerVECTOR_REVERSE() local 9959 SDLoc DL(Op); lowerVECTOR_SPLICE() local 9994 SDLoc DL(Op); lowerFixedLengthVectorLoadToRVV() local 10041 SDLoc DL(Op); lowerFixedLengthVectorStoreToRVV() local 10090 SDLoc DL(Op); lowerMaskedLoad() local 10155 SDLoc DL(Op); lowerMaskedStore() local 10219 SDLoc DL(Op); lowerFixedLengthVectorSetccToRVV() local 10234 SDLoc DL(Op); lowerVectorStrictFSetcc() local 10321 SDLoc DL(Op); lowerABS() local 10359 SDLoc DL(Op); lowerFixedLengthVectorFCOPYSIGNToRVV() local 10393 SDLoc DL(Op); lowerFixedLengthVectorSelectToRVV() local 10428 SDLoc DL(Op); lowerToScalableOp() local 10460 SDLoc DL(Op); lowerVPOp() local 10513 SDLoc DL(Op); lowerVPExtMaskOp() local 10546 SDLoc DL(Op); lowerVPSetCCMaskOp() local 10626 SDLoc DL(Op); lowerVPFPIntConvOp() local 10760 SDLoc DL(Op); lowerVPSpliceExperimental() local 10841 SDLoc DL(Op); lowerVPReverseExperimental() local 10978 SDLoc DL(Op); lowerLogicVPOp() local 10987 SDLoc DL(Op); lowerVPStridedLoad() local 11033 SDLoc DL(Op); lowerVPStridedStore() local 11076 SDLoc DL(Op); lowerMaskedGather() local 11176 SDLoc DL(Op); lowerMaskedScatter() local 11258 SDLoc DL(Op); lowerGET_ROUNDING() local 11289 SDLoc DL(Op); lowerSET_ROUNDING() local 11361 SDLoc DL(N); customLegalizeToWOp() local 11373 SDLoc DL(N); customLegalizeToWOpWithSExt() local 11385 SDLoc DL(N); ReplaceNodeResults() local 11580 SDLoc DL(N); ReplaceNodeResults() local 12102 const SDLoc DL(N); combineBinOpOfExtractToReduceTree() local 12268 SDLoc DL(N); combineBinOpToReduce() local 12325 SDLoc DL(N); transformAddShlImm() local 12482 SDLoc DL(N); transformAddImmMulImm() local 12495 SDLoc DL(N); combineAddOfBooleanXor() local 12538 SDLoc DL(N); combineSubOfBoolean() local 12587 SDLoc DL(N); performSUBCombine() local 12640 SDLoc DL(N); combineDeMorganOfBoolean() local 12659 SDLoc DL(N0); performTRUNCATECombine() local 12687 SDLoc DL(N); performANDCombine() local 12736 SDLoc DL(N); combineOrOfCZERO() local 12785 SDLoc DL(N); performXORCombine() local 12799 SDLoc DL(N); performXORCombine() local 12810 SDLoc DL(N0); performXORCombine() local 12833 SDLoc DL(N); performMULCombine() local 12879 SDLoc DL(N); narrowIndex() local 13088 SDLoc DL(Root); getOrCreateExtendedOp() local 13214 SDLoc DL(Root); fillUpExtensionSupport() local 13349 SDLoc DL(Root); getMaskAndVL() local 13867 SDLoc DL(N); performFP_TO_INTCombine() local 13990 SDLoc DL(N); performFP_TO_INT_SATCombine() local 14020 SDLoc DL(N); performBITREVERSECombine() local 14294 SDLoc DL(N); performSRACombine() local 14349 SDLoc DL(N); performSRACombine() local 14436 combine_CC(SDValue & LHS,SDValue & RHS,SDValue & CC,const SDLoc & DL,SelectionDAG & DAG,const RISCVSubtarget & Subtarget) combine_CC() argument 14561 SDLoc DL(N); tryFoldSelectIntoOp() local 14643 SDLoc DL(N); useInversedSetcc() local 14695 SDLoc DL(N); performBUILD_VECTORCombine() local 14750 SDLoc DL(N); performINSERT_VECTOR_ELTCombine() local 14820 SDLoc DL(N); performCONCAT_VECTORSCombine() local 14989 SDLoc DL(N); combineToVWMACC() local 15012 SDLoc DL(N); combineToVWMACC() local 15019 legalizeScatterGatherIndexType(SDLoc DL,SDValue & Index,ISD::MemIndexType & IndexType,RISCVTargetLowering::DAGCombinerInfo & DCI) legalizeScatterGatherIndexType() argument 15133 SDLoc DL(N); PerformDAGCombine() local 15228 SDLoc DL(N); PerformDAGCombine() local 15402 SDLoc DL(N); PerformDAGCombine() local 15501 SDLoc DL(N); PerformDAGCombine() local 15536 SDLoc DL(N); PerformDAGCombine() local 15550 SDLoc DL(N); PerformDAGCombine() local 15649 SDLoc DL(N); PerformDAGCombine() local 15685 SDLoc DL(N); PerformDAGCombine() local 15710 SDLoc DL(N); PerformDAGCombine() local 15732 SDLoc DL(N); PerformDAGCombine() local 15751 SDLoc DL(N); PerformDAGCombine() local 15798 SDLoc DL(N); PerformDAGCombine() local 15875 SDLoc DL(N); PerformDAGCombine() local 16061 SDLoc DL(N); PerformDAGCombine() local 16082 SDLoc DL(N); PerformDAGCombine() local 16200 SDLoc DL(Op); targetShrinkDemandedConstant() local 16579 DebugLoc DL = MI.getDebugLoc(); emitReadCycleWidePseudo() local 16613 DebugLoc DL = MI.getDebugLoc(); emitSplitF64Pseudo() local 16652 DebugLoc DL = MI.getDebugLoc(); emitBuildPairF64Pseudo() local 16703 DebugLoc DL = MI.getDebugLoc(); emitQuietFCMP() local 16776 const DebugLoc &DL = First.getDebugLoc(); EmitLoweredCascadedSelect() local 16916 DebugLoc DL = MI.getDebugLoc(); emitSelectPseudo() local 16978 DebugLoc DL = MI.getDebugLoc(); emitVFROUND_NOEXCEPT_MASK() local 17090 DebugLoc DL = MI.getDebugLoc(); emitFROUND() local 17425 CC_RISCV(const DataLayout & DL,RISCVABI::ABI ABI,unsigned ValNo,MVT ValVT,MVT LocVT,CCValAssign::LocInfo LocInfo,ISD::ArgFlagsTy ArgFlags,CCState & State,bool IsFixed,bool IsRet,Type * OrigTy,const RISCVTargetLowering & TLI,std::optional<unsigned> FirstMaskArgument) CC_RISCV() argument 17738 convertLocVTToValVT(SelectionDAG & DAG,SDValue Val,const CCValAssign & VA,const SDLoc & DL,const RISCVSubtarget & Subtarget) convertLocVTToValVT() argument 17769 unpackFromRegLoc(SelectionDAG & DAG,SDValue Chain,const CCValAssign & VA,const SDLoc & DL,const ISD::InputArg & In,const RISCVTargetLowering & TLI) unpackFromRegLoc() argument 17802 convertValVTToLocVT(SelectionDAG & DAG,SDValue Val,const CCValAssign & VA,const SDLoc & DL,const RISCVSubtarget & Subtarget) convertValVTToLocVT() argument 17835 unpackFromMemLoc(SelectionDAG & DAG,SDValue Chain,const CCValAssign & VA,const SDLoc & DL) unpackFromMemLoc() argument 17871 unpackF64OnRV32DSoftABI(SelectionDAG & DAG,SDValue Chain,const CCValAssign & VA,const CCValAssign & HiVA,const SDLoc & DL) unpackF64OnRV32DSoftABI() argument 17902 CC_RISCV_FastCC(const DataLayout & DL,RISCVABI::ABI ABI,unsigned ValNo,MVT ValVT,MVT LocVT,CCValAssign::LocInfo LocInfo,ISD::ArgFlagsTy ArgFlags,CCState & State,bool IsFixed,bool IsRet,Type * OrigTy,const RISCVTargetLowering & TLI,std::optional<unsigned> FirstMaskArgument) CC_RISCV_FastCC() argument 18082 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 18315 SDLoc &DL = CLI.DL; LowerCall() local 18640 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & DL,SelectionDAG & DAG) const LowerReturn() argument 19461 const DataLayout &DL = AI->getModule()->getDataLayout(); emitMaskedAtomicRMWIntrinsic() local 19843 splitValueIntoRegisterParts(SelectionDAG & DAG,const SDLoc & DL,SDValue Val,SDValue * Parts,unsigned NumParts,MVT PartVT,std::optional<CallingConv::ID> CC) const splitValueIntoRegisterParts() argument 19898 joinRegisterPartsIntoValue(SelectionDAG & DAG,const SDLoc & DL,const SDValue * Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,std::optional<CallingConv::ID> CC) const joinRegisterPartsIntoValue() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 430 SDLoc DL(Op); in LowerOperation() local 453 SDLoc DL(Op); in LowerOperation() local 623 SDLoc DL(Vector); vectorToVerticalVector() local 638 SDLoc DL(Op); LowerEXTRACT_VECTOR_ELT() local 653 SDLoc DL(Op); LowerINSERT_VECTOR_ELT() local 675 const DataLayout &DL = DAG.getDataLayout(); LowerGlobalAddress() local 688 SDLoc DL(Op); LowerTrig() local 726 SDLoc DL(Op); LowerUADDSUBO() local 743 SDLoc DL(Op); lowerFP_TO_UINT() local 753 SDLoc DL(Op); lowerFP_TO_SINT() local 763 LowerImplicitParameter(SelectionDAG & DAG,EVT VT,const SDLoc & DL,unsigned DwordOffset) const LowerImplicitParameter() argument 802 SDLoc DL(Op); LowerSELECT_CC() local 982 SDLoc DL(Ptr); stackPtrToRegIndex() local 1018 SDLoc DL(Store); lowerPrivateTruncStore() local 1118 SDLoc DL(Op); LowerSTORE() local 1264 SDLoc DL(Op); lowerPrivateExtLoad() local 1329 SDLoc DL(Op); LowerLOAD() local 1458 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 1526 getSetCCResultType(const DataLayout & DL,LLVMContext &,EVT VT) const getSetCCResultType() argument 1566 SDLoc DL(VectorEntry); CompactSwizzlableVector() local 1610 SDLoc DL(VectorEntry); ReorganizeVector() local 1670 SDLoc DL(LoadNode); constBufferLoad() local 1721 SDLoc DL(N); PerformDAGCombine() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kInstrInfo.cpp | 282 ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const { in insertBranch() argument 314 MachineBasicBlock::iterator I, DebugLoc DL, in AddSExt() argument 331 MachineBasicBlock::iterator I, DebugLoc DL, in AddZExt() argument 370 DebugLoc DL = MIB->getDebugLoc(); ExpandMOVX_RR() local 418 DebugLoc DL = MIB->getDebugLoc(); ExpandMOVSZX_RR() local 462 DebugLoc DL = MIB->getDebugLoc(); ExpandMOVSZX_RM() local 481 DebugLoc DL = MIB->getDebugLoc(); ExpandPUSH_POP() local 512 auto DL = MIB->getDebugLoc(); ExpandMOVEM() local 631 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,MCRegister DstReg,MCRegister SrcReg,bool KillSrc) const copyPhysReg() argument 754 DebugLoc DL = MBB.findDebugLoc(MI); storeRegToStackSlot() local 772 DebugLoc DL = MBB.findDebugLoc(MI); loadRegFromStackSlot() local 849 DebugLoc DL = FirstMBB.findDebugLoc(MBBI); runOnMachineFunction() local [all...] |