Home
last modified time | relevance | path

Searched defs:DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_V_UPDATE (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h425 DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_V_UPDATE = 0x5, enumerator
H A Ddce_11_0_enum.h1190 DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_V_UPDATE = 0x5, enumerator
H A Ddce_11_2_enum.h1597 DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_V_UPDATE = 0x5, enumerator
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/
H A Dvega10_enum.h12216 DCIO_GPU_TIMER_READ_SELECT_UPPER_D3_V_UPDATE = 0x00000005, enumerator