| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 404 MCPhysReg CmpReg = KnownReg.Reg; in optimizeBlock() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 138 Register CmpReg = AndCC->getReg(); in optimizeVcndVcmpPair() local
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| H A D | AMDGPURegisterBankInfo.cpp | 917 auto CmpReg = B.buildICmp(CmpInst::ICMP_EQ, S1, CurrentLaneParts[i], in executeInWaterfallLoop() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2203 Register CmpReg = fastEmitInst_rri(CmpOpcode, VK1, CmpLHSReg, CmpRHSReg, X86FastEmitSSESelect() local
2236 Register CmpReg = fastEmitInst_rri(CmpOpcode, RC, CmpLHSReg, CmpRHSReg, X86FastEmitSSESelect() local
2258 Register CmpReg = fastEmitInst_rri(Opc[0], RC, CmpLHSReg, CmpRHSReg, CC); X86FastEmitSSESelect() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1389 Register CmpReg = legalizeICMP() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1290 Register CmpReg = getRegForValue(BI->getCondition()); SelectBranch() local
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| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 503 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; LowerFPToInt() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 12377 unsigned CmpReg = Incr2Reg; EmitPartwordAtomicBinary() local
13049 Register CmpReg = RegInfo.createVirtualRegister(&PPC::CRRCRegClass); EmitInstrWithCustomInserter() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 18642 Register CmpReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); emitFROUND() local
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