| /llvm-project/llvm/lib/FuzzMutate/ |
| H A D | Operations.cpp | 149 Instruction::OtherOps CmpOp, in cmpOpDescriptor() argument
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 237 expandCMP_SWAP(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,unsigned LdarOp,unsigned StlrOp,unsigned CmpOp,unsigned ExtendImm,unsigned ZeroReg,MachineBasicBlock::iterator & NextMBBI) expandCMP_SWAP() argument
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| H A D | AArch64ISelLowering.cpp | 19889 SDValue CmpOp = Op->getOperand(2); foldOverflowCheck() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 814 getCmpOperandFoldingProfit(Register CmpOp,MachineRegisterInfo & MRI) getCmpOperandFoldingProfit() argument
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| /llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 1610 unsigned CmpOp = getFCmpOpcode(I.getOperand(1).getPredicate()); selectFCmp() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitSimplify.cpp | 2617 MachineOperand &CmpOp = MI->getOperand(2); in simplifyRCmp0() local
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| H A D | HexagonInstrInfo.cpp | 3526 const MachineOperand &CmpOp = GA.getOperand(2); getCompoundOpcode() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 3235 unsigned CmpOp = Subtarget.isPPC64() ? PPC::CMPD : PPC::CMPW; expandPostRAPseudo() local
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| H A D | PPCISelLowering.cpp | 11235 SDValue CmpOp = Op.getOperand(2); LowerATOMIC_CMP_SWAP() local
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3462 isAbsolute(SDValue CmpOp,SDValue Pos,SDValue Neg) isAbsolute() argument
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 2932 SDValue CmpOp = getValue(CB.CmpMHS); visitSwitchCase() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 46906 SDValue CmpOp = EFLAGS.getOperand(0); combineSetCCMOVMSK() local
[all...] |