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Searched defs:CPU (Results 1 – 25 of 206) sorted by relevance

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/llvm-project/compiler-rt/lib/xray/
H A Dxray_fdr_controller.h147 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in recordPreamble()
182 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in rewindRecords()
245 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in functionEnter()
269 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in functionTailExit()
293 bool functionEnterArg(int32_t FuncId, uint64_t TSC, uint16_t CPU, in functionEnterArg()
311 uint16_t CPU) XRAY_NEVER_INSTRUMENT { in functionExit()
333 bool customEvent(uint64_t TSC, uint16_t CPU, const void *Event, in customEvent()
347 bool typedEvent(uint64_t TSC, uint16_t CPU, uint16_t EventType, in typedEvent()
H A Dxray_tsc.h28 ALWAYS_INLINE uint64_t readTSC(uint8_t &CPU) XRAY_NEVER_INSTRUMENT { in readTSC() argument
68 ALWAYS_INLINE uint64_t readTSC(uint8_t &CPU) XRAY_NEVER_INSTRUMENT { in readTSC() argument
/llvm-project/compiler-rt/lib/xray/tests/unit/
H A Dfdr_controller_test.cpp84 uint16_t CPU = 1; in TEST_F() local
143 uint16_t CPU = 0; in TEST_F() local
168 uint16_t CPU = 0; in TEST_F() local
195 uint16_t CPU = 1; in TEST_F() local
222 uint16_t CPU = 1; in TEST_F() local
256 uint16_t CPU = 1; in TEST_F() local
320 uint16_t CPU = 1; in TEST_F() local
336 uint16_t CPU = 1; in TEST_F() local
353 uint16_t CPU = 1; in TEST_F() local
374 uint16_t CPU = 1; in TEST_F() local
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/llvm-project/llvm/lib/Target/BPF/
H A DBPFSubtarget.cpp46 BPFSubtarget &BPFSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies() argument
67 void BPFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { in initSubtargetFeatures() argument
96 BPFSubtarget(const Triple & TT,const std::string & CPU,const std::string & FS,const TargetMachine & TM) BPFSubtarget() argument
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/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaSubtarget.cpp26 XtensaSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { in initializeSubtargetDependencies()
40 XtensaSubtarget::XtensaSubtarget(const Triple &TT, StringRef CPU, StringRef FS, in XtensaSubtarget()
H A DXtensaTargetMachine.cpp31 computeDataLayout(const Triple & TT,StringRef CPU,const TargetOptions & Options,bool IsLittle) computeDataLayout() argument
46 XtensaTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT,bool IsLittle) XtensaTargetMachine() argument
60 XtensaTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT) XtensaTargetMachine() argument
72 auto CPU = CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU; getSubtargetImpl() local
/llvm-project/llvm/lib/Target/AVR/
H A DAVRSubtarget.cpp30 AVRSubtarget(const Triple & TT,const std::string & CPU,const std::string & FS,const AVRTargetMachine & TM) AVRSubtarget() argument
39 initializeSubtargetDependencies(StringRef CPU,StringRef FS,const TargetMachine & TM) initializeSubtargetDependencies() argument
/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430Subtarget.cpp42 initializeSubtargetDependencies(StringRef CPU,StringRef FS) initializeSubtargetDependencies() argument
58 MSP430Subtarget(const Triple & TT,const std::string & CPU,const std::string & FS,const TargetMachine & TM) MSP430Subtarget() argument
/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.cpp28 WebAssemblySubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies() argument
41 WebAssemblySubtarget(const Triple & TT,const std::string & CPU,const std::string & FS,const TargetMachine & TM) WebAssemblySubtarget() argument
/llvm-project/clang/lib/Driver/ToolChains/Arch/
H A DM68k.cpp34 std::string CPU = std::string(llvm::sys::getHostCPUName()); in getM68kTargetCPU() local
79 std::string CPU = m68k::getM68kTargetCPU(Args); in addFloatABIFeatures() local
H A DAArch64.cpp34 std::string CPU; in getAArch64TargetCPU() local
93 DecodeAArch64Mcpu(const Driver & D,StringRef Mcpu,StringRef & CPU,llvm::AArch64::ExtensionSet & Extensions) DecodeAArch64Mcpu() argument
142 StringRef CPU; getAArch64ArchFeaturesFromMcpu() local
179 StringRef CPU; getAArch64MicroArchFeaturesFromMcpu() local
441 std::string CPU = getCPUName(D, Args, Triple); getAArch64TargetFeatures() local
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H A DRISCV.cpp85 StringRef CPU = A->getValue(); getRISCVTargetFeatures() local
292 StringRef CPU = A->getValue(); getRISCVArch() local
346 std::string CPU; getRISCVTargetCPU() local
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/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXSubtarget.cpp32 initializeSubtargetDependencies(StringRef CPU,StringRef FS) initializeSubtargetDependencies() argument
52 NVPTXSubtarget(const Triple & TT,const std::string & CPU,const std::string & FS,const NVPTXTargetMachine & TM) NVPTXSubtarget() argument
/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonELFObjectWriter.cpp27 StringRef CPU; global() member in __anoncfa3702c0111::HexagonELFObjectWriter
301 createHexagonELFObjectWriter(uint8_t OSABI,StringRef CPU) createHexagonELFObjectWriter() argument
/llvm-project/llvm/lib/Target/VE/
H A DVESubtarget.cpp44 : VEGenSubtargetInfo(TT, CPU, /*TuneCPU=*/CPU, FS), TargetTriple(TT), in VESubtarget() argument
28 initializeSubtargetDependencies(StringRef CPU,StringRef FS) initializeSubtargetDependencies() argument
/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiSubtarget.cpp33 initSubtargetFeatures(CPU, FS); in initializeSubtargetDependencies() argument
25 initSubtargetFeatures(StringRef CPU,StringRef FS) initSubtargetFeatures() argument
/llvm-project/llvm/lib/Target/Sparc/
H A DSparcSubtarget.cpp30 initializeSubtargetDependencies(StringRef CPU,StringRef TuneCPU,StringRef FS) initializeSubtargetDependencies() argument
49 SparcSubtarget(const StringRef & CPU,const StringRef & TuneCPU,const StringRef & FS,const TargetMachine & TM,bool is64Bit) SparcSubtarget() argument
H A DSparcTargetMachine.cpp99 SparcTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT,bool is64bit) SparcTargetMachine() argument
122 std::string CPU = getSubtargetImpl() local
201 SparcV8TargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT) SparcV8TargetMachine() argument
211 SparcV9TargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT) SparcV9TargetMachine() argument
221 SparcelTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT) SparcelTargetMachine() argument
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/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchSubtarget.cpp28 initializeSubtargetDependencies(const Triple & TT,StringRef CPU,StringRef TuneCPU,StringRef FS,StringRef ABIName) initializeSubtargetDependencies() argument
84 LoongArchSubtarget(const Triple & TT,StringRef CPU,StringRef TuneCPU,StringRef FS,StringRef ABIName,const TargetMachine & TM) LoongArchSubtarget() argument
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/llvm-project/llvm/lib/Target/M68k/
H A DM68kSubtarget.cpp42 static StringRef selectM68kCPU(Triple TT, StringRef CPU) { in selectM68kCPU() argument
51 M68kSubtarget::M68kSubtarget(const Triple &TT, StringRef CPU, StringRef FS, in M68kSubtarget() argument
88 initializeSubtargetDependencies(StringRef CPU,Triple TT,StringRef FS,const M68kTargetMachine & TM) initializeSubtargetDependencies() argument
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/llvm-project/llvm/lib/Target/ARM/
H A DARMSubtarget.cpp73 ARMSubtarget &ARMSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies() argument
80 ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU, in initializeFrameLowering() argument
89 ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, in ARMSubtarget() argument
154 initSubtargetFeatures(StringRef CPU,StringRef FS) initSubtargetFeatures() argument
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/llvm-project/llvm/lib/Target/Mips/
H A DMipsTargetMachine.cpp73 computeDataLayout(const Triple & TT,StringRef CPU,const TargetOptions & Options,bool isLittle) computeDataLayout() argument
122 MipsTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT,bool isLittle) MipsTargetMachine() argument
151 MipsebTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT) MipsebTargetMachine() argument
161 MipselTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT) MipselTargetMachine() argument
173 std::string CPU = getSubtargetImpl() local
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/llvm-project/llvm/lib/TargetParser/
H A DRISCVTargetParser.cpp42 getCPUInfoByName(StringRef CPU) getCPUInfoByName() argument
49 hasFastUnalignedAccess(StringRef CPU) hasFastUnalignedAccess() argument
54 parseCPU(StringRef CPU,bool IsRV64) parseCPU() argument
76 getMArchFromMcpu(StringRef CPU) getMArchFromMcpu() argument
100 getFeaturesForCPU(StringRef CPU,SmallVectorImpl<std::string> & EnabledFeatures,bool NeedPlus) getFeaturesForCPU() argument
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H A DARMTargetParser.cpp269 getDefaultFPU(StringRef CPU,ARM::ArchKind AK) getDefaultFPU() argument
280 getDefaultExtensions(StringRef CPU,ARM::ArchKind AK) getDefaultExtensions() argument
420 appendArchExtFeatures(StringRef CPU,ARM::ArchKind AK,StringRef ArchExt,std::vector<StringRef> & Features,ARM::FPUKind & ArgFPUKind) appendArchExtFeatures() argument
496 for (const auto &CPU : CPUNames) { getDefaultCPU() local
522 parseCPUArch(StringRef CPU) parseCPUArch() argument
537 computeDefaultTargetABI(const Triple & TT,StringRef CPU) computeDefaultTargetABI() argument
612 StringRef CPU = llvm::ARM::getDefaultCPU(MArch); getARMCPUForArch() local
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/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZSubtarget.cpp32 if (CPU.empty()) in initializeSubtargetDependencies() argument
66 SystemZSubtarget(const Triple & TT,const std::string & CPU,const std::string & TuneCPU,const std::string & FS,const TargetMachine & TM) SystemZSubtarget() argument

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