| /netbsd-src/sys/arch/evbmips/malta/ |
| H A D | malta_bus_mem.c | 57 #define CHIP_W1_BUS_START(v) MALTA_PCIMEM1_BASE macro
66 #define CHIP_W1_BUS_START(v) MALTA_PCIMEM1_BASE macro
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| H A D | malta_bus_io.c | 51 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| /netbsd-src/sys/arch/cobalt/dev/ |
| H A D | gt_io_space.c | 50 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| H A D | gt_mem_space.c | 50 #define CHIP_W1_BUS_START(v) 0x12000000UL macro
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| /netbsd-src/sys/arch/mips/adm5120/ |
| H A D | adm5120_obio_space.c | 79 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| H A D | adm5120_pciio_space.c | 49 #define CHIP_W1_BUS_START(v) ADM5120_BASE_PCI_IO macro
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| H A D | adm5120_pcimem_space.c | 49 #define CHIP_W1_BUS_START(v) ADM5120_BASE_PCI_MEM macro
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| /netbsd-src/sys/arch/mips/atheros/ |
| H A D | arbusle.c | 47 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| /netbsd-src/sys/arch/mips/alchemy/ |
| H A D | au_cpureg_mem.c | 50 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| /netbsd-src/sys/arch/algor/algor/ |
| H A D | algor_p4032_bus_locio.c | 59 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| H A D | algor_p4032_bus_io.c | 61 #define CHIP_W1_BUS_START(v) \ macro
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| H A D | algor_p5064_bus_io.c | 59 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| H A D | algor_p6032_bus_mem.c | 64 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| H A D | algor_p6032_bus_io.c | 59 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| /netbsd-src/sys/arch/evbmips/gdium/ |
| H A D | gdium_bus_io.c | 60 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| H A D | gdium_bus_mem.c | 64 #define CHIP_W1_BUS_START(v) 0x00000000UL macro
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| /netbsd-src/sys/arch/evbmips/mipssim/ |
| H A D | mipssim_bus_io.c | 51 #define CHIP_W1_BUS_START(v) 0 macro
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| /netbsd-src/sys/arch/mips/sibyte/pci/ |
| H A D | sbbrz_bus_mem.c | 52 #define CHIP_W1_BUS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x01000000) macro
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| H A D | sbbrz_bus_io.c | 52 #define CHIP_W1_BUS_START(v) 0x00008000UL macro
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| /netbsd-src/sys/arch/mips/rmi/ |
| H A D | rmixl_pci_mem_space.c | 57 #define CHIP_W1_BUS_START(v) (((struct rmixl_config *)(v))->rc_pci_mem_pbase) macro
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| H A D | rmixl_obio_eb_space.c | 57 #define CHIP_W1_BUS_START(v) 0 macro
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| H A D | rmixl_pci_ecfg_space.c | 57 #define CHIP_W1_BUS_START(v) \ macro
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| H A D | rmixl_iobus_space.c | 64 #define CHIP_W1_BUS_START(v) 0 macro
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| H A D | rmixl_pci_cfg_space.c | 57 #define CHIP_W1_BUS_START(v) \ macro
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| H A D | rmixl_pci_io_space.c | 57 #define CHIP_W1_BUS_START(v) (((struct rmixl_config *)(v))->rc_pci_io_pbase) macro
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