| /netbsd-src/sys/arch/evbmips/malta/ |
| H A D | malta_bus_mem.c | 58 #define CHIP_W1_BUS_END(v) MALTA_PCIMEM1_SIZE + \ macro
67 #define CHIP_W1_BUS_END(v) MALTA_PCIMEM1_SIZE macro
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| H A D | malta_bus_io.c | 52 #define CHIP_W1_BUS_END(v) MALTA_PCIMEM3_SIZE macro
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| /netbsd-src/sys/arch/cobalt/dev/ |
| H A D | gt_io_space.c | 51 #define CHIP_W1_BUS_END(v) 0x02000000UL macro
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| H A D | gt_mem_space.c | 51 #define CHIP_W1_BUS_END(v) 0x14000000UL macro
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| /netbsd-src/sys/arch/mips/adm5120/ |
| H A D | adm5120_obio_space.c | 80 #define CHIP_W1_BUS_END(v) 0x1fffffffUL macro
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| H A D | adm5120_pciio_space.c | 50 #define CHIP_W1_BUS_END(v) ADM5120_BASE_PCI_CONFADDR macro
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| H A D | adm5120_pcimem_space.c | 50 #define CHIP_W1_BUS_END(v) ADM5120_BASE_PCI_IO macro
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| /netbsd-src/sys/arch/mips/atheros/ |
| H A D | arbusle.c | 48 #define CHIP_W1_BUS_END(v) 0x1fffffffUL macro
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| /netbsd-src/sys/arch/mips/alchemy/ |
| H A D | au_cpureg_mem.c | 51 #define CHIP_W1_BUS_END(v) 0x1fffffffUL macro
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| /netbsd-src/sys/arch/algor/algor/ |
| H A D | algor_p4032_bus_locio.c | 60 #define CHIP_W1_BUS_END(v) 0xffffffffUL macro
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| H A D | algor_p4032_bus_io.c | 63 #define CHIP_W1_BUS_END(v) \ macro
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| H A D | algor_p5064_bus_io.c | 60 #define CHIP_W1_BUS_END(v) 0x00ffffffUL macro
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| H A D | algor_p6032_bus_mem.c | 65 #define CHIP_W1_BUS_END(v) 0x0bffffffUL macro
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| H A D | algor_p6032_bus_io.c | 60 #define CHIP_W1_BUS_END(v) 0x000fffffUL macro
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| /netbsd-src/sys/arch/evbmips/gdium/ |
| H A D | gdium_bus_io.c | 61 #define CHIP_W1_BUS_END(v) 0x000fffffUL macro
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| H A D | gdium_bus_mem.c | 65 #define CHIP_W1_BUS_END(v) 0x0bffffffUL macro
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| /netbsd-src/sys/arch/evbmips/mipssim/ |
| H A D | mipssim_bus_io.c | 52 #define CHIP_W1_BUS_END(v) (MIPSSIM_ISA_IO_SIZE + MIPSSIM_VIRTIO_IO_SIZE) macro
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| /netbsd-src/sys/arch/mips/sibyte/pci/ |
| H A D | sbbrz_bus_mem.c | 53 #define CHIP_W1_BUS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x20000000) macro
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| H A D | sbbrz_bus_io.c | 53 #define CHIP_W1_BUS_END(v) 0x02000000UL macro
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| /netbsd-src/sys/arch/mips/rmi/ |
| H A D | rmixl_pci_mem_space.c | 58 #define CHIP_W1_BUS_END(v) (CHIP_W1_SYS_START(v) + \ macro
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| H A D | rmixl_obio_eb_space.c | 58 #define CHIP_W1_BUS_END(v) (RMIXL_IO_DEV_SIZE - 1) macro
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| H A D | rmixl_pci_ecfg_space.c | 59 #define CHIP_W1_BUS_END(v) \ macro
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| H A D | rmixl_iobus_space.c | 65 #define CHIP_W1_BUS_END(v) RMIXL_FLASH_BAR_MASK_MAX macro
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| H A D | rmixl_pci_cfg_space.c | 59 #define CHIP_W1_BUS_END(v) \ macro
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| H A D | rmixl_pci_io_space.c | 58 #define CHIP_W1_BUS_END(v) (CHIP_W1_SYS_START(v) + \ macro
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