| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LowerAMXType.cpp | 245 combineLoadBitcast(LoadInst * LD,BitCastInst * Bitcast) combineLoadBitcast() argument
269 combineBitcastStore(BitCastInst * Bitcast,StoreInst * ST) combineBitcastStore() argument
301 transformBitcast(BitCastInst * Bitcast) transformBitcast() argument
366 auto *Bitcast = dyn_cast<BitCastInst>(&Inst); visit() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreLegalizerCombiner.cpp | 199 auto Bitcast = B.buildBitcast({S32}, CvtPk); applyClampI64ToI16() local
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| H A D | AMDGPURegisterBankInfo.cpp | 1724 auto Bitcast = B.buildBitcast(S32, Src); unpackV2S16ToS32() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 446 auto Bitcast = in legalizeCustom() local
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| H A D | MipsISelLowering.cpp | 5030 Register Bitcast = MRI.createVirtualRegister(&Mips::MSA128WRegClass); emitSTR_D() local
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| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegacyLegalizerInfo.h | 55 Bitcast, enumerator
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| H A D | LegalizerInfo.h | 74 Bitcast, enumerator
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| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 164 Bitcast, enumerator
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| /llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | CodeExtractor.cpp | 549 << *Bitcast << " in out-of-region lifetime marker " in findAllocas() local
582 Instruction *Bitcast = cast<Instruction>(U); findAllocas() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Arm64ECCallLowering.cpp | 52 Bitcast, global() enumerator
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| H A D | AArch64ISelLowering.cpp | 24824 SDValue Bitcast = Insert.getOperand(1); performDupLane128Combine() local
[all...] |
| /llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | FunctionSpecialization.cpp | 484 if (auto *Bitcast = dyn_cast<BitCastInst>(User)) { getPromotableAlloca() local
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1776 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); legalizeLoadStore() local
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| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2484 SDValue Bitcast = N->getOperand(0); performVECTOR_SHUFFLECombine() local
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| /llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2568 SDValue Bitcast = DAG.getNode(ISD::BITCAST, SL, MVT::i32, A); LowerFROUND32() local
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| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 3261 auto *Bitcast = dyn_cast<BitCastInst>(Cmp.getOperand(0)); foldICmpBitCast() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16010 SDNode *Bitcast = *Trunc->use_begin(); PerformDAGCombine() local
18027 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0)); combineTRUNCATE() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18046 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); PerformMinMaxCombine() local
18087 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); PerformMinMaxCombine() local
[all...] |
| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5464 SDValue Bitcast = DAG.getBitcast(IntVT, FloatVal); lowerCTLZ_CTTZ_ZERO_UNDEF() local
|