| /llvm-project/clang/test/Misc/ |
| H A D | diag-macro-backtrace.c | 54 #define ADD(a, b) a ## #b macro
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| H A D | reduced-diags-macros-backtrace.cpp | 6 #define ADD(x,y) G(x) + y macro
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| H A D | reduced-diags-macros.cpp | 22 #define ADD(x,y) y + F(x) macro
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| /llvm-project/flang/lib/Lower/OpenMP/ |
| H A D | ReductionProcessor.h | 47 ADD, enumerator
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| /llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.h | 72 ADD, enumerator
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| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiAluCode.h | 22 ADD = 0x00, enumerator
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| /llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaRegisterInfo.cpp | 109 unsigned ADD = Xtensa::ADD; in eliminateFrameIndex() local
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| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandPseudoInsts.cpp | 289 unsigned ADD = STI.is64Bit() ? LoongArch::ADD_D : LoongArch::ADD_W; expandLoadAddressTLSDesc() local
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| /llvm-project/flang/lib/Parser/ |
| H A D | preprocessor.cpp | 882 ADD, ExpressionValue() enumerator
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| /llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 653 auto ADD = MIB.buildInstr(RISCV::ADD, {&RISCV::GPRRegClass}, select() local
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| /llvm-project/lld/ELF/Arch/ |
| H A D | PPC64.cpp | 47 ADD = 266, enumerator
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| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 246 ADD, enumerator
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 399 ADD, global() enumerator
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| /llvm-project/llvm/include/llvm/TableGen/ |
| H A D | Record.h | 900 ADD, global() enumerator
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| /llvm-project/polly/lib/External/isl/ |
| H A D | isl_map.c | 7203 #define ADD isl_pw_multi_aff_union_add macro
7288 #define ADD isl_map_union_disjoint macro
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| /llvm-project/compiler-rt/lib/msan/tests/ |
| H A D | msan_test.cpp | 4395 template<class T> ALWAYS_INLINE T ADD(const T &a, const T&b) { return a + b; } in ADD() function
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