Lines Matching refs:gencode
1693 * mips.igen: Remove gencode comment from top of file, fix
2110 (oengine.c, gencode): Delete remaining references.
2178 * Makefile.in (gencode): Kill, kill, kill.
2179 * gencode.c: Ditto.
2210 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2227 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2279 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2315 * gencode.c (build_instruction): Ditto.
2395 * gencode.c: Mark BEGEZALL as LIKELY.
2510 * gencode.c (build_instruction): Do not generate checks for
2629 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2887 * gencode.c (MSUB): Similarly.
2969 * gencode.c (build_mips16_operands): Replace IPC with cia.
3115 * gencode.c (build_instruction): Follow sim_write's lead in using
3150 * gencode.c (build_instruction): Change type of vaddr and paddr to
3196 * gencode.c (build_instruction): Generate DecodeCoproc not
3227 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3231 * gencode.c (build_instruction): For "FPSQRT", output correct
3341 * gencode.c (print_igen_insn_models): Assume certain architectures
3347 gencode file.
3349 * gencode.c (FEATURE_IGEN): Define.
3383 * gencode.c (SDBBP,DERET): Added (3900) insns.
3400 * gencode.c: Add r3900 (tx39).
3405 * gencode.c (build_instruction): Don't need to subtract 4 for
3432 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3473 * gencode.c (build_instruction): Two arg MADD should
3493 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3547 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3646 * gencode.c (build_instruction): DIV instructions: check
3722 * gencode.c (build_mips16_operands): Correct computation of base
3740 * gencode.c (build_instruction): The high order may be set in the
3765 * gencode.c (build_instruction): Use BigEndianCPU instead of
3798 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3808 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3816 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3822 * gencode.c (build_mips16_operands): Fix base PC value for PC
3838 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3857 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3874 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3880 * gencode.c (inst_type): Add mips16 instruction encoding types.
3934 * gencode.c: Pass instruction value through SignalException()
3947 * gencode.c (process_instructions): Call build_endian_shift when
3956 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3973 * gencode.c: Use sim_warning() rather than WARNING macro.
3977 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3978 getopt1.o, rather than on gencode.c. Link objects together.
3980 (gencode.o, getopt.o, getopt1.o): New targets.
3981 * gencode.c: Include <ctype.h> and "ansidecl.h".
3990 * gencode.c (process_instructions): Generate word64 and uword64
4016 * gencode.c: Change LOADDRMASK to 64bit memory model only.
4055 * gencode.c (process_instructions): Ensure FP ABS instruction
4069 * Makefile.in (gencode): Ensure the host compiler and libraries
4074 * interp.c, gencode.c: Some more (TODO) tidying.
4078 * gencode.c, interp.c: Replaced explicit long long references with
4099 * gencode.c: Tidied instruction decoding, and added FP instruction
4108 gencode.c, interp.c, support.h: created.