Lines Matching full:into
6 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ARG0]], %[[CST]] : vector<8xf32> into…
10 %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xf32> into f32
18 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ADD]], %[[CST]] : vector<8xf32> into …
22 %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xf32> into f32
23 %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
30 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ADD]] : vector<8xf32> into f32
33 %0 = vector.reduction <add>, %arg0 : vector<8xf32> into f32
34 %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
41 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ADD]] : vector<8xf32> into f32
46 %0 = vector.reduction <add>, %x : vector<8xf32> into f32
47 %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
57 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ADD1]], %[[CST]] : vector<8xf32> into…
62 %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xf32> into f32
63 %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
64 %2 = vector.reduction <add>, %arg2, %1 : vector<8xf32> into f32
71 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ARG0]], %[[CST]] : vector<8xi32> into…
75 %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xi32> into i32
83 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ADD]], %[[CST]] : vector<8xi32> into …
87 %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xi32> into i32
88 %1 = vector.reduction <add>, %arg1, %0 : vector<8xi32> into i32
95 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ADD]] : vector<8xi32> into i32
98 %0 = vector.reduction <add>, %arg0 : vector<8xi32> into i32
99 %1 = vector.reduction <add>, %arg1, %0 : vector<8xi32> into i32
107 // CHECK-NEXT: %[[RES:.+]] = vector.reduction <add>, %[[ADD]], %[[CST]] : vector<8xi32> into …
113 %0 = vector.reduction <add>, %x, %cst0 : vector<8xi32> into i32
114 %1 = vector.reduction <add>, %arg1, %0 : vector<8xi32> into i32