bit-checks.ll - OpenGrok cross reference for /llvm-project/llvm/test/Transforms/InstCombine/bit-checks.ll

Lines Matching full:and
6 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
11   %and = and i32 %argc, 1
12   %tobool = icmp ne i32 %and, 0
13   %and2 = and i32 %argc, 2
15   %or.cond = and i1 %tobool, %tobool3
22 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
27   %and = and i32 %argc, 1
28   %tobool = icmp ne i32 %and, 0
29   %and2 = and i32 %argc, 2
38 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
43   %and = and i32 %argc, 1
44   %tobool = icmp eq i32 %and, 0
45   %and2 = and i32 %argc, 2
54 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
59   %and = and i32 %argc, 1
60   %tobool = icmp eq i32 %and, 0
61   %and2 = and i32 %argc, 2
75 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
80   %and = and i32 %argc, 7
81   %tobool = icmp eq i32 %and, 0
82   %and2 = and i32 %argc, 48
84   %and.cond = and i1 %tobool, %tobool3
85   %storemerge = select i1 %and.cond, i32 0, i32 1
91 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
96   %and = and i32 %argc, 7
97   %tobool = icmp eq i32 %and, 0
98   %and2 = and i32 %argc, 48
100   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
101   %storemerge = select i1 %and.cond, i32 0, i32 1
107 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
112   %and = and i32 %argc, 7
113   %tobool = icmp eq i32 %and, 0
114   %and2 = and i32 %argc, 16
116   %and.cond = and i1 %tobool, %tobool3
117   %storemerge = select i1 %and.cond, i32 0, i32 1
123 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
128   %and = and i32 %argc, 7
129   %tobool = icmp eq i32 %and, 0
130   %and2 = and i32 %argc, 16
132   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
133   %storemerge = select i1 %and.cond, i32 0, i32 1
140 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
145   %and = and i32 %argc, %argc2
146   %tobool = icmp eq i32 %and, 0
147   %and2 = and i32 %argc, %argc3
149   %and.cond = and i1 %tobool, %tobool3
150   %storemerge = select i1 %and.cond, i32 0, i32 1
156 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
157 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
158 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
164   %and = and i32 %argc, %argc2
165   %tobool = icmp eq i32 %and, 0
166   %and2 = and i32 %argc, %argc3
168   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
169   %storemerge = select i1 %and.cond, i32 0, i32 1
176 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
181   %and = and i32 %argc, 7
182   %tobool = icmp ne i32 %and, 0
183   %and2 = and i32 %argc, 48
192 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
197   %and = and i32 %argc, 7
198   %tobool = icmp ne i32 %and, 0
199   %and2 = and i32 %argc, 48
208 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
213   %and = and i32 %argc, 7
214   %tobool = icmp ne i32 %and, 0
215   %and2 = and i32 %argc, 16
224 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
229   %and = and i32 %argc, 7
230   %tobool = icmp ne i32 %and, 0
231   %and2 = and i32 %argc, 16
241 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
246   %and = and i32 %argc, %argc2
247   %tobool = icmp ne i32 %and, 0
248   %and2 = and i32 %argc, %argc3
257 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
258 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
259 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
265   %and = and i32 %argc, %argc2
266   %tobool = icmp ne i32 %and, 0
267   %and2 = and i32 %argc, %argc3
277 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
282   %and = and i32 %argc, 7
283   %tobool = icmp eq i32 %and, 7
284   %and2 = and i32 %argc, 48
286   %and.cond = and i1 %tobool, %tobool3
287   %storemerge = select i1 %and.cond, i32 0, i32 1
293 ; CHECK-NEXT:    [[TMP1:%.*]] = and <2 x i32> [[ARGC:%.*]], splat (i32 55)
298   %and = and <2 x i32> %argc, <i32 7, i32 7>
299   %tobool = icmp eq <2 x i32> %and, <i32 7, i32 7>
300   %and2 = and <2 x i32> %argc, <i32 48, i32 48>
302   %and.cond = and <2 x i1> %tobool, %tobool3
303   %storemerge = select <2 x i1> %and.cond, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 1, i32 1>
309 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
314   %and = and i32 %argc, 7
315   %tobool = icmp eq i32 %and, 7
316   %and2 = and i32 %argc, 48
318   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
319   %storemerge = select i1 %and.cond, i32 0, i32 1
325 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
330   %and = and i32 %argc, 7
331   %tobool = icmp eq i32 %and, 7
332   %and2 = and i32 %argc, 16
334   %and.cond = and i1 %tobool, %tobool3
335   %storemerge = select i1 %and.cond, i32 0, i32 1
341 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
346   %and = and i32 %argc, 7
347   %tobool = icmp eq i32 %and, 7
348   %and2 = and i32 %argc, 16
350   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
351   %storemerge = select i1 %and.cond, i32 0, i32 1
358 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
363   %and = and i32 %argc, %argc2
364   %tobool = icmp eq i32 %and, %argc2
365   %and2 = and i32 %argc, %argc3
367   %and.cond = and i1 %tobool, %tobool3
368   %storemerge = select i1 %and.cond, i32 0, i32 1
374 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
375 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC2]]
376 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
382   %and = and i32 %argc, %argc2
383   %tobool = icmp eq i32 %and, %argc2
384   %and2 = and i32 %argc, %argc3
386   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
387   %storemerge = select i1 %and.cond, i32 0, i32 1
394 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
399   %and = and i32 %argc, 7
400   %tobool = icmp ne i32 %and, 7
401   %and2 = and i32 %argc, 48
410 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
415   %and = and i32 %argc, 7
416   %tobool = icmp ne i32 %and, 7
417   %and2 = and i32 %argc, 48
426 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
431   %and = and i32 %argc, 7
432   %tobool = icmp ne i32 %and, 7
433   %and2 = and i32 %argc, 16
442 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
447   %and = and i32 %argc, 7
448   %tobool = icmp ne i32 %and, 7
449   %and2 = and i32 %argc, 16
459 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
464   %and = and i32 %argc, %argc2
465   %tobool = icmp ne i32 %and, %argc2
466   %and2 = and i32 %argc, %argc3
475 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
476 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC2]]
477 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
483   %and = and i32 %argc, %argc2
484   %tobool = icmp ne i32 %and, %argc2
485   %and2 = and i32 %argc, %argc3
495 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
496 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 7
501   %and = and i32 %argc, 7
502   %tobool = icmp eq i32 %and, 7
503   %and2 = and i32 %argc2, 7
505   %and.cond = and i1 %tobool, %tobool3
506   %storemerge = select i1 %and.cond, i32 0, i32 1
512 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
513 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7
514 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7
520   %and = and i32 %argc, 7
521   %tobool = icmp eq i32 %and, 7
522   %and2 = and i32 %argc2, 7
524   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
525   %storemerge = select i1 %and.cond, i32 0, i32 1
531 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
532 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
537   %and = and i32 %argc, %argc2
538   %tobool = icmp eq i32 %and, %argc
539   %and2 = and i32 %argc, %argc3
541   %and.cond = and i1 %tobool, %tobool3
542   %storemerge = select i1 %and.cond, i32 0, i32 1
548 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
549 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC]]
550 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
556   %and = and i32 %argc, %argc2
557   %tobool = icmp eq i32 %and, %argc
558   %and2 = and i32 %argc, %argc3
560   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
561   %storemerge = select i1 %and.cond, i32 0, i32 1
568 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
569 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 7
574   %and = and i32 %argc, 7
575   %tobool = icmp ne i32 %and, 7
576   %and2 = and i32 %argc2, 7
585 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
586 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7
587 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7
593   %and = and i32 %argc, 7
594   %tobool = icmp ne i32 %and, 7
595   %and2 = and i32 %argc2, 7
604 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
605 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
610   %and = and i32 %argc, %argc2
611   %tobool = icmp ne i32 %and, %argc
612   %and2 = and i32 %argc, %argc3
621 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
622 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC]]
623 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
629   %and = and i32 %argc, %argc2
630   %tobool = icmp ne i32 %and, %argc
631   %and2 = and i32 %argc, %argc3
639 ; if B, C, D, E are constant, and it's possible
642 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
647   %and = and i32 %argc, 7
648   %tobool = icmp eq i32 %and, 3
649   %and2 = and i32 %argc, 48
651   %and.cond = and i1 %tobool, %tobool3
652   %storemerge = select i1 %and.cond, i32 0, i32 1
658 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
663   %and = and i32 %argc, 7
664   %tobool = icmp eq i32 %and, 3
665   %and2 = and i32 %argc, 48
667   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
668   %storemerge = select i1 %and.cond, i32 0, i32 1
674 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
679   %and = and i32 %argc, 7
680   %tobool = icmp eq i32 %and, 3
681   %and2 = and i32 %argc, 16
683   %and.cond = and i1 %tobool, %tobool3
684   %storemerge = select i1 %and.cond, i32 0, i32 1
690 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
695   %and = and i32 %argc, 7
696   %tobool = icmp eq i32 %and, 3
697   %and2 = and i32 %argc, 16
699   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
700   %storemerge = select i1 %and.cond, i32 0, i32 1
705 ; if B, C, D, E are constant, and it's possible
708 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
713   %and = and i32 %argc, 7
714   %tobool = icmp ne i32 %and, 3
715   %and2 = and i32 %argc, 48
724 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
729   %and = and i32 %argc, 7
730   %tobool = icmp ne i32 %and, 3
731   %and2 = and i32 %argc, 48
740 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
745   %and = and i32 %argc, 7
746   %tobool = icmp ne i32 %and, 3
747   %and2 = and i32 %argc, 16
756 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
761   %and = and i32 %argc, 7
762   %tobool = icmp ne i32 %and, 3
763   %and2 = and i32 %argc, 16
775 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
780   %and1 = and i32 %argc2, %argc
782   %and2 = and i32 %argc3, %argc
784   %and.cond = and i1 %tobool, %tobool3
785   %storemerge = select i1 %and.cond, i32 0, i32 1
791 ; CHECK-NEXT:    [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]
793 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]
799   %and1 = and i32 %argc2, %argc
801   %and2 = and i32 %argc3, %argc
803   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
804   %storemerge = select i1 %and.cond, i32 0, i32 1
813 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
819   %and1 = and i32 %argc, %argc2
821   %and2 = and i32 %argc, %argc3
823   %and.cond = and i1 %tobool, %tobool3
824   %storemerge = select i1 %and.cond, i32 0, i32 1
830 ; CHECK-NEXT:    [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
832 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
838   %and1 = and i32 %argc, %argc2
840   %and2 = and i32 %argc, %argc3
842   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
843   %storemerge = select i1 %and.cond, i32 0, i32 1
852 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
858   %and1 = and i32 %argc2, %argc
860   %and2 = and i32 %argc3, %argc
862   %and.cond = and i1 %tobool, %tobool3
863   %storemerge = select i1 %and.cond, i32 0, i32 1
869 ; CHECK-NEXT:    [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]
871 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]
877   %and1 = and i32 %argc2, %argc
879   %and2 = and i32 %argc3, %argc
881   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
882   %storemerge = select i1 %and.cond, i32 0, i32 1
889 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
890 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
892 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
897   %bc = and i32 %argc2, %argc4
898   %de = and i32 %argc3, %argc5
899   %and1 = and i32 %argc, %bc
901   %and2 = and i32 %argc, %de
903   %and.cond = and i1 %tobool, %tobool3
904   %storemerge = select i1 %and.cond, i32 0, i32 1
910 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
911 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
912 ; CHECK-NEXT:    [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[BC]]
914 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[DE]]
920   %bc = and i32 %argc2, %argc4
921   %de = and i32 %argc3, %argc5
922   %and1 = and i32 %argc, %bc
924   %and2 = and i32 %argc, %de
926   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
927   %storemerge = select i1 %and.cond, i32 0, i32 1
934 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
935 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
937 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
942   %bc = and i32 %argc2, %argc4
943   %de = and i32 %argc3, %argc5
944   %and1 = and i32 %bc, %argc
946   %and2 = and i32 %de, %argc
948   %and.cond = and i1 %tobool, %tobool3
949   %storemerge = select i1 %and.cond, i32 0, i32 1
955 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
956 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
957 ; CHECK-NEXT:    [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
959 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
965   %bc = and i32 %argc2, %argc4
966   %de = and i32 %argc3, %argc5
967   %and1 = and i32 %bc, %argc
969   %and2 = and i32 %de, %argc
971   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
972   %storemerge = select i1 %and.cond, i32 0, i32 1
979 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
980 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
982 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
987   %bc = and i32 %argc2, %argc4
988   %de = and i32 %argc3, %argc5
989   %and1 = and i32 %argc, %bc
991   %and2 = and i32 %argc, %de
993   %and.cond = and i1 %tobool, %tobool3
994   %storemerge = select i1 %and.cond, i32 0, i32 1
1000 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
1001 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
1002 ; CHECK-NEXT:    [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[BC]]
1004 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ARGC]], [[DE]]
1010   %bc = and i32 %argc2, %argc4
1011   %de = and i32 %argc3, %argc5
1012   %and1 = and i32 %argc, %bc
1014   %and2 = and i32 %argc, %de
1016   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
1017   %storemerge = select i1 %and.cond, i32 0, i32 1
1024 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
1025 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
1027 ; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[ARGC:%.*]], [[TMP1]]
1032   %bc = and i32 %argc2, %argc4
1033   %de = and i32 %argc3, %argc5
1034   %and1 = and i32 %bc, %argc
1036   %and2 = and i32 %de, %argc
1038   %and.cond = and i1 %tobool, %tobool3
1039   %storemerge = select i1 %and.cond, i32 0, i32 1
1045 ; CHECK-NEXT:    [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
1046 ; CHECK-NEXT:    [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
1047 ; CHECK-NEXT:    [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
1049 ; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
1055   %bc = and i32 %argc2, %argc4
1056   %de = and i32 %argc3, %argc5
1057   %and1 = and i32 %bc, %argc
1059   %and2 = and i32 %de, %argc
1061   %and.cond = select i1 %tobool, i1 %tobool3, i1 false
1062   %storemerge = select i1 %and.cond, i32 0, i32 1
1068 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1073   %and = and i32 %argc, 64
1074   %tobool = icmp ne i32 %and, 0
1084 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1089   %and = and i32 %argc, 64
1090   %tobool = icmp ne i32 %and, 0
1100 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1105   %and = and i32 %argc, 64
1106   %tobool = icmp ne i32 %and, 0
1109   %or.cond = and i1 %tobool, %tobool3
1116 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1121   %and = and i32 %argc, 64
1122   %tobool = icmp ne i32 %and, 0
1132 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1137   %and = and i32 %argc, 64
1138   %tobool = icmp eq i32 %and, 0
1141   %or.cond = and i1 %tobool, %tobool3
1148 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1153   %and = and i32 %argc, 64
1154   %tobool = icmp eq i32 %and, 0
1164 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1169   %and = and i32 %argc, 64
1170   %tobool = icmp eq i32 %and, 0
1180 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
1185   %and = and i32 %argc, 64
1186   %tobool = icmp eq i32 %and, 0
1196 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1212 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1228 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1237   %or.cond = and i1 %tobool, %tobool3
1244 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1260 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1269   %or.cond = and i1 %tobool, %tobool3
1276 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1292 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1308 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
1357 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[A:%.*]], [[C:%.*]]
1389 ; CHECK-NEXT:    [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], [[C:%.*]]
1404 ; CHECK-NEXT:    [[AND:%.*]] = icmp eq i64 [[A:%.*]], -9223372036854775808
1405 ; CHECK-NEXT:    ret i1 [[AND]]
1408   %a.mask = and i64 %a, 9223372036854775807
1410   %and = and i1 %cmp1, %cmp2
1411   ret i1 %and