Lines Matching +full:llvm +full:- +full:test

2 ; RUN: llc -O0 -mtriple=riscv32 -mattr=+m -mattr=+xcvalu -verify-machineinstrs < %s \
5 declare i32 @llvm.abs.i32(i32, i1)
6 declare i32 @llvm.smin.i32(i32, i32)
7 declare i32 @llvm.smax.i32(i32, i32)
8 declare i32 @llvm.umin.i32(i32, i32)
9 declare i32 @llvm.umax.i32(i32, i32)
12 ; CHECK-LABEL: abs:
14 ; CHECK-NEXT:    cv.abs a0, a0
15 ; CHECK-NEXT:    ret
16   %1 = call i32 @llvm.abs.i32(i32 %a, i1 false)
21 ; CHECK-LABEL: slet:
23 ; CHECK-NEXT:    cv.sle a0, a0, a1
24 ; CHECK-NEXT:    ret
30 ; CHECK-LABEL: sletu:
32 ; CHECK-NEXT:    cv.sleu a0, a0, a1
33 ; CHECK-NEXT:    ret
39 ; CHECK-LABEL: smin:
41 ; CHECK-NEXT:    cv.min a0, a0, a1
42 ; CHECK-NEXT:    ret
43   %1 = call i32 @llvm.smin.i32(i32 %a, i32 %b)
48 ; CHECK-LABEL: umin:
50 ; CHECK-NEXT:    cv.minu a0, a0, a1
51 ; CHECK-NEXT:    ret
52   %1 = call i32 @llvm.umin.i32(i32 %a, i32 %b)
57 ; CHECK-LABEL: smax:
59 ; CHECK-NEXT:    cv.max a0, a0, a1
60 ; CHECK-NEXT:    ret
61   %1 = call i32 @llvm.smax.i32(i32 %a, i32 %b)
66 ; CHECK-LABEL: umax:
68 ; CHECK-NEXT:    cv.maxu a0, a0, a1
69 ; CHECK-NEXT:    ret
70   %1 = call i32 @llvm.umax.i32(i32 %a, i32 %b)
75 ; CHECK-LABEL: exths:
77 ; CHECK-NEXT:    # kill: def $x11 killed $x10
78 ; CHECK-NEXT:    cv.exths a0, a0
79 ; CHECK-NEXT:    ret
85 ; CHECK-LABEL: exthz:
87 ; CHECK-NEXT:    # kill: def $x11 killed $x10
88 ; CHECK-NEXT:    cv.exthz a0, a0
89 ; CHECK-NEXT:    ret
95 ; CHECK-LABEL: extbs:
97 ; CHECK-NEXT:    # kill: def $x11 killed $x10
98 ; CHECK-NEXT:    cv.extbs a0, a0
99 ; CHECK-NEXT:    ret
105 ; CHECK-LABEL: extbz:
107 ; CHECK-NEXT:    # kill: def $x11 killed $x10
108 ; CHECK-NEXT:    cv.extbz a0, a0
109 ; CHECK-NEXT:    ret
114 declare i32 @llvm.riscv.cv.alu.clip(i32, i32)
116 define i32 @test.cv.alu.clip.case.a(i32 %a) {
117 ; CHECK-LABEL: test.cv.alu.clip.case.a:
119 ; CHECK-NEXT:    cv.clip a0, a0, 5
120 ; CHECK-NEXT:    ret
121   %1 = call i32 @llvm.riscv.cv.alu.clip(i32 %a, i32 15)
125 define i32 @test.cv.alu.clip.case.b(i32 %a) {
126 ; CHECK-LABEL: test.cv.alu.clip.case.b:
128 ; CHECK-NEXT:    li a1, 10
129 ; CHECK-NEXT:    cv.clipr a0, a0, a1
130 ; CHECK-NEXT:    ret
131   %1 = call i32 @llvm.riscv.cv.alu.clip(i32 %a, i32 10)
135 declare i32 @llvm.riscv.cv.alu.clipu(i32, i32)
137 define i32 @test.cv.alu.clipu.case.a(i32 %a) {
138 ; CHECK-LABEL: test.cv.alu.clipu.case.a:
140 ; CHECK-NEXT:    cv.clipu a0, a0, 9
141 ; CHECK-NEXT:    ret
142   %1 = call i32 @llvm.riscv.cv.alu.clipu(i32 %a, i32 255)
146 define i32 @test.cv.alu.clipu.case.b(i32 %a) {
147 ; CHECK-LABEL: test.cv.alu.clipu.case.b:
149 ; CHECK-NEXT:    li a1, 200
150 ; CHECK-NEXT:    cv.clipur a0, a0, a1
151 ; CHECK-NEXT:    ret
152   %1 = call i32 @llvm.riscv.cv.alu.clipu(i32 %a, i32 200)
156 declare i32 @llvm.riscv.cv.alu.addN(i32, i32, i32)
158 define i32 @test.cv.alu.addN.case.a(i32 %a, i32 %b) {
159 ; CHECK-LABEL: test.cv.alu.addN.case.a:
161 ; CHECK-NEXT:    cv.addn a0, a0, a1, 15
162 ; CHECK-NEXT:    ret
163   %1 = call i32 @llvm.riscv.cv.alu.addN(i32 %a, i32 %b, i32 15)
167 define i32 @test.cv.alu.addN.case.b(i32 %a, i32 %b) {
168 ; CHECK-LABEL: test.cv.alu.addN.case.b:
170 ; CHECK-NEXT:    li a2, 32
171 ; CHECK-NEXT:    cv.addnr a0, a1, a2
172 ; CHECK-NEXT:    ret
173   %1 = call i32 @llvm.riscv.cv.alu.addN(i32 %a, i32 %b, i32 32)
177 declare i32 @llvm.riscv.cv.alu.adduN(i32, i32, i32)
179 define i32 @test.cv.alu.adduN.case.a(i32 %a, i32 %b) {
180 ; CHECK-LABEL: test.cv.alu.adduN.case.a:
182 ; CHECK-NEXT:    cv.addun a0, a0, a1, 15
183 ; CHECK-NEXT:    ret
184   %1 = call i32 @llvm.riscv.cv.alu.adduN(i32 %a, i32 %b, i32 15)
188 define i32 @test.cv.alu.adduN.case.b(i32 %a, i32 %b) {
189 ; CHECK-LABEL: test.cv.alu.adduN.case.b:
191 ; CHECK-NEXT:    li a2, 32
192 ; CHECK-NEXT:    cv.addunr a0, a1, a2
193 ; CHECK-NEXT:    ret
194   %1 = call i32 @llvm.riscv.cv.alu.adduN(i32 %a, i32 %b, i32 32)
198 declare i32 @llvm.riscv.cv.alu.addRN(i32, i32, i32)
200 define i32 @test.cv.alu.addRN.case.a(i32 %a, i32 %b) {
201 ; CHECK-LABEL: test.cv.alu.addRN.case.a:
203 ; CHECK-NEXT:    cv.addrn a0, a0, a1, 15
204 ; CHECK-NEXT:    ret
205   %1 = call i32 @llvm.riscv.cv.alu.addRN(i32 %a, i32 %b, i32 15)
209 define i32 @test.cv.alu.addRN.case.b(i32 %a, i32 %b) {
210 ; CHECK-LABEL: test.cv.alu.addRN.case.b:
212 ; CHECK-NEXT:    li a2, 32
213 ; CHECK-NEXT:    cv.addrnr a0, a1, a2
214 ; CHECK-NEXT:    ret
215   %1 = call i32 @llvm.riscv.cv.alu.addRN(i32 %a, i32 %b, i32 32)
219 declare i32 @llvm.riscv.cv.alu.adduRN(i32, i32, i32)
221 define i32 @test.cv.alu.adduRN.case.a(i32 %a, i32 %b) {
222 ; CHECK-LABEL: test.cv.alu.adduRN.case.a:
224 ; CHECK-NEXT:    cv.addurn a0, a0, a1, 15
225 ; CHECK-NEXT:    ret
226   %1 = call i32 @llvm.riscv.cv.alu.adduRN(i32 %a, i32 %b, i32 15)
230 define i32 @test.cv.alu.adduRN.case.b(i32 %a, i32 %b) {
231 ; CHECK-LABEL: test.cv.alu.adduRN.case.b:
233 ; CHECK-NEXT:    li a2, 32
234 ; CHECK-NEXT:    cv.addurnr a0, a1, a2
235 ; CHECK-NEXT:    ret
236   %1 = call i32 @llvm.riscv.cv.alu.adduRN(i32 %a, i32 %b, i32 32)
240 declare i32 @llvm.riscv.cv.alu.subN(i32, i32, i32)
242 define i32 @test.cv.alu.subN.case.a(i32 %a, i32 %b) {
243 ; CHECK-LABEL: test.cv.alu.subN.case.a:
245 ; CHECK-NEXT:    cv.subn a0, a0, a1, 15
246 ; CHECK-NEXT:    ret
247   %1 = call i32 @llvm.riscv.cv.alu.subN(i32 %a, i32 %b, i32 15)
251 define i32 @test.cv.alu.subN.case.b(i32 %a, i32 %b) {
252 ; CHECK-LABEL: test.cv.alu.subN.case.b:
254 ; CHECK-NEXT:    li a2, 32
255 ; CHECK-NEXT:    cv.subnr a0, a1, a2
256 ; CHECK-NEXT:    ret
257   %1 = call i32 @llvm.riscv.cv.alu.subN(i32 %a, i32 %b, i32 32)
261 declare i32 @llvm.riscv.cv.alu.subuN(i32, i32, i32)
263 define i32 @test.cv.alu.subuN.case.a(i32 %a, i32 %b) {
264 ; CHECK-LABEL: test.cv.alu.subuN.case.a:
266 ; CHECK-NEXT:    cv.subun a0, a0, a1, 15
267 ; CHECK-NEXT:    ret
268   %1 = call i32 @llvm.riscv.cv.alu.subuN(i32 %a, i32 %b, i32 15)
272 define i32 @test.cv.alu.subuN.case.b(i32 %a, i32 %b) {
273 ; CHECK-LABEL: test.cv.alu.subuN.case.b:
275 ; CHECK-NEXT:    li a2, 32
276 ; CHECK-NEXT:    cv.subunr a0, a1, a2
277 ; CHECK-NEXT:    ret
278   %1 = call i32 @llvm.riscv.cv.alu.subuN(i32 %a, i32 %b, i32 32)
282 declare i32 @llvm.riscv.cv.alu.subRN(i32, i32, i32)
284 define i32 @test.cv.alu.subRN.case.a(i32 %a, i32 %b) {
285 ; CHECK-LABEL: test.cv.alu.subRN.case.a:
287 ; CHECK-NEXT:    cv.subrn a0, a0, a1, 15
288 ; CHECK-NEXT:    ret
289   %1 = call i32 @llvm.riscv.cv.alu.subRN(i32 %a, i32 %b, i32 15)
293 define i32 @test.cv.alu.subRN.case.b(i32 %a, i32 %b) {
294 ; CHECK-LABEL: test.cv.alu.subRN.case.b:
296 ; CHECK-NEXT:    li a2, 32
297 ; CHECK-NEXT:    cv.subrnr a0, a1, a2
298 ; CHECK-NEXT:    ret
299   %1 = call i32 @llvm.riscv.cv.alu.subRN(i32 %a, i32 %b, i32 32)
303 declare i32 @llvm.riscv.cv.alu.subuRN(i32, i32, i32)
305 define i32 @test.cv.alu.subuRN.case.a(i32 %a, i32 %b) {
306 ; CHECK-LABEL: test.cv.alu.subuRN.case.a:
308 ; CHECK-NEXT:    cv.suburn a0, a0, a1, 15
309 ; CHECK-NEXT:    ret
310   %1 = call i32 @llvm.riscv.cv.alu.subuRN(i32 %a, i32 %b, i32 15)
314 define i32 @test.cv.alu.subuRN.case.b(i32 %a, i32 %b) {
315 ; CHECK-LABEL: test.cv.alu.subuRN.case.b:
317 ; CHECK-NEXT:    li a2, 32
318 ; CHECK-NEXT:    cv.suburnr a0, a1, a2
319 ; CHECK-NEXT:    ret
320   %1 = call i32 @llvm.riscv.cv.alu.subuRN(i32 %a, i32 %b, i32 32)