Lines Matching full:default

3 ; RUN: llc -verify-machineinstrs=0 -mtriple=amdgcn-amd-amdhsa -debug-pass=Structure -o /dev/null %s 2>&1 | FileCheck -check-prefix=DEFAULT %s
4 ; RUN: llc -verify-machineinstrs=0 -sgpr-regalloc=greedy -wwm-regalloc=greedy -vgpr-regalloc=greedy -mtriple=amdgcn-amd-amdhsa -debug-pass=Structure -o /dev/null %s 2>&1 | FileCheck -check-prefix=DEFAULT %s
8 ; RUN: llc -verify-machineinstrs=0 -wwm-regalloc=basic -vgpr-regalloc=basic -mtriple=amdgcn-amd-amdhsa -debug-pass=Structure -o /dev/null %s 2>&1 | FileCheck -check-prefix=DEFAULT-BASIC %s
9 ; RUN: llc -verify-machineinstrs=0 -sgpr-regalloc=basic -mtriple=amdgcn-amd-amdhsa -debug-pass=Structure -o /dev/null %s 2>&1 | FileCheck -check-prefix=BASIC-DEFAULT %s
18 ; DEFAULT: Greedy Register Allocator
19 ; DEFAULT-NEXT: Virtual Register Rewriter
20 ; DEFAULT-NEXT: Stack Slot Coloring
21 ; DEFAULT-NEXT: SI lower SGPR spill instructions
22 ; DEFAULT-NEXT: Virtual Register Map
23 ; DEFAULT-NEXT: Live Register Matrix
24 ; DEFAULT-NEXT: SI Pre-allocate WWM Registers
25 ; DEFAULT-NEXT: Live Stack Slot Analysis
26 ; DEFAULT-NEXT: Greedy Register Allocator
27 ; DEFAULT-NEXT: SI Lower WWM Copies
28 ; DEFAULT-NEXT: Virtual Register Rewriter
29 ; DEFAULT-NEXT: AMDGPU Reserve WWM Registers
30 ; DEFAULT-NEXT: Virtual Register Map
31 ; DEFAULT-NEXT: Live Register Matrix
32 ; DEFAULT-NEXT: Greedy Register Allocator
33 ; DEFAULT-NEXT: GCN NSA Reassign
34 ; DEFAULT-NEXT: Virtual Register Rewriter
35 ; DEFAULT-NEXT: AMDGPU Mark Last Scratch Load
36 ; DEFAULT-NEXT: Stack Slot Coloring
54 ; BASIC-DEFAULT: Debug Variable Analysis
55 ; BASIC-DEFAULT-NEXT: Live Stack Slot Analysis
56 ; BASIC-DEFAULT-NEXT: Machine Natural Loop Construction
57 ; BASIC-DEFAULT-NEXT: Machine Block Frequency Analysis
58 ; BASIC-DEFAULT-NEXT: Virtual Register Map
59 ; BASIC-DEFAULT-NEXT: Live Register Matrix
60 ; BASIC-DEFAULT-NEXT: Basic Register Allocator
61 ; BASIC-DEFAULT-NEXT: Virtual Register Rewriter
62 ; BASIC-DEFAULT-NEXT: Stack Slot Coloring
63 ; BASIC-DEFAULT-NEXT: SI lower SGPR spill instructions
64 ; BASIC-DEFAULT-NEXT: Virtual Register Map
65 ; BASIC-DEFAULT-NEXT: Live Register Matrix
66 ; BASIC-DEFAULT-NEXT: SI Pre-allocate WWM Registers
67 ; BASIC-DEFAULT-NEXT: Live Stack Slot Analysis
68 ; BASIC-DEFAULT-NEXT: Bundle Machine CFG Edges
69 ; BASIC-DEFAULT-NEXT: Spill Code Placement Analysis
70 ; BASIC-DEFAULT-NEXT: Lazy Machine Block Frequency Analysis
71 ; BASIC-DEFAULT-NEXT: Machine Optimization Remark Emitter
72 ; BASIC-DEFAULT-NEXT: Greedy Register Allocator
73 ; BASIC-DEFAULT-NEXT: SI Lower WWM Copies
74 ; BASIC-DEFAULT-NEXT: Virtual Register Rewriter
75 ; BASIC-DEFAULT-NEXT: AMDGPU Reserve WWM Registers
76 ; BASIC-DEFAULT-NEXT: Virtual Register Map
77 ; BASIC-DEFAULT-NEXT: Live Register Matrix
78 ; BASIC-DEFAULT-NEXT: Greedy Register Allocator
79 ; BASIC-DEFAULT-NEXT: GCN NSA Reassign
80 ; BASIC-DEFAULT-NEXT: Virtual Register Rewriter
81 ; BASIC-DEFAULT-NEXT: AMDGPU Mark Last Scratch Load
82 ; BASIC-DEFAULT-NEXT: Stack Slot Coloring
86 ; DEFAULT-BASIC: Greedy Register Allocator
87 ; DEFAULT-BASIC-NEXT: Virtual Register Rewriter
88 ; DEFAULT-BASIC-NEXT: Stack Slot Coloring
89 ; DEFAULT-BASIC-NEXT: SI lower SGPR spill instructions
90 ; DEFAULT-BASIC-NEXT: Virtual Register Map
91 ; DEFAULT-BASIC-NEXT: Live Register Matrix
92 ; DEFAULT-BASIC-NEXT: SI Pre-allocate WWM Registers
93 ; DEFAULT-BASIC-NEXT: Live Stack Slot Analysis
94 ; DEFAULT-BASIC-NEXT: Basic Register Allocator
95 ; DEFAULT-BASIC-NEXT: SI Lower WWM Copies
96 ; DEFAULT-BASIC-NEXT: Virtual Register Rewriter
97 ; DEFAULT-BASIC-NEXT: AMDGPU Reserve WWM Registers
98 ; DEFAULT-BASIC-NEXT: Virtual Register Map
99 ; DEFAULT-BASIC-NEXT: Live Register Matrix
100 ; DEFAULT-BASIC-NEXT: Basic Register Allocator
101 ; DEFAULT-BASIC-NEXT: GCN NSA Reassign
102 ; DEFAULT-BASIC-NEXT: Virtual Register Rewriter
103 ; DEFAULT-BASIC-NEXT: AMDGPU Mark Last Scratch Load
104 ; DEFAULT-BASIC-NEXT: Stack Slot Coloring