Lines Matching +full:2 +full:d
5 … 16 x i8> @eor3_nxv16i8_left(<vscale x 16 x i8> %0, <vscale x 16 x i8> %1, <vscale x 16 x i8> %2) {
8 ; SVE-NEXT: eor z0.d, z0.d, z1.d
9 ; SVE-NEXT: eor z0.d, z0.d, z2.d
14 ; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
17 %5 = xor <vscale x 16 x i8> %4, %2
21 …16 x i8> @eor3_nxv16i8_right(<vscale x 16 x i8> %0, <vscale x 16 x i8> %1, <vscale x 16 x i8> %2) {
24 ; SVE-NEXT: eor z0.d, z0.d, z1.d
25 ; SVE-NEXT: eor z0.d, z2.d, z0.d
30 ; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
31 ; SVE2-NEXT: mov z0.d, z2.d
34 %5 = xor <vscale x 16 x i8> %2, %4
38 … 8 x i16> @eor3_nxv8i16_left(<vscale x 8 x i16> %0, <vscale x 8 x i16> %1, <vscale x 8 x i16> %2) {
41 ; SVE-NEXT: eor z0.d, z0.d, z1.d
42 ; SVE-NEXT: eor z0.d, z0.d, z2.d
47 ; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
50 %5 = xor <vscale x 8 x i16> %4, %2
54 …8 x i16> @eor3_nxv8i16_right(<vscale x 8 x i16> %0, <vscale x 8 x i16> %1, <vscale x 8 x i16> %2) {
57 ; SVE-NEXT: eor z0.d, z0.d, z1.d
58 ; SVE-NEXT: eor z0.d, z2.d, z0.d
63 ; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
64 ; SVE2-NEXT: mov z0.d, z2.d
67 %5 = xor <vscale x 8 x i16> %2, %4
71 … 4 x i32> @eor3_nxv4i32_left(<vscale x 4 x i32> %0, <vscale x 4 x i32> %1, <vscale x 4 x i32> %2) {
74 ; SVE-NEXT: eor z0.d, z0.d, z1.d
75 ; SVE-NEXT: eor z0.d, z0.d, z2.d
80 ; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
83 %5 = xor <vscale x 4 x i32> %4, %2
87 …4 x i32> @eor3_nxv4i32_right(<vscale x 4 x i32> %0, <vscale x 4 x i32> %1, <vscale x 4 x i32> %2) {
90 ; SVE-NEXT: eor z0.d, z0.d, z1.d
91 ; SVE-NEXT: eor z0.d, z2.d, z0.d
96 ; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
97 ; SVE2-NEXT: mov z0.d, z2.d
100 %5 = xor <vscale x 4 x i32> %2, %4
104 define <vscale x 2 x i64> @eor3_nxv2i64_left(<vscale x 2 x i64> %0, <vscale x 2 x i64> %1, <vscale …
107 ; SVE-NEXT: eor z0.d, z0.d, z1.d
108 ; SVE-NEXT: eor z0.d, z0.d, z2.d
113 ; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
115 %4 = xor <vscale x 2 x i64> %0, %1
116 %5 = xor <vscale x 2 x i64> %4, %2
117 ret <vscale x 2 x i64> %5
120 define <vscale x 2 x i64> @eor3_nxv2i64_right(<vscale x 2 x i64> %0, <vscale x 2 x i64> %1, <vscale…
123 ; SVE-NEXT: eor z0.d, z0.d, z1.d
124 ; SVE-NEXT: eor z0.d, z2.d, z0.d
129 ; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
130 ; SVE2-NEXT: mov z0.d, z2.d
132 %4 = xor <vscale x 2 x i64> %0, %1
133 %5 = xor <vscale x 2 x i64> %2, %4
134 ret <vscale x 2 x i64> %5
137 define <vscale x 2 x i64> @eor3_vnot(<vscale x 2 x i64> %0, <vscale x 2 x i64> %1) {
140 ; SVE-NEXT: eor z0.d, z0.d, z1.d
145 ; SVE2-NEXT: eor z0.d, z0.d, z1.d
147 %3 = xor <vscale x 2 x i64> %0, zeroinitializer
148 %4 = xor <vscale x 2 x i64> %3, %1
149 ret <vscale x 2 x i64> %4