Lines Matching +full:0 +full:x8
12 ; ALL: // %bb.0:
15 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 1, i1 0)
21 ; ALL: // %bb.0:
25 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 2, i1 0)
31 ; ALL: // %bb.0:
33 ; ALL-NEXT: and w9, w1, #0xff
37 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 4, i1 0)
43 ; ALL: // %bb.0:
45 ; ALL-NEXT: mov x8, #72340172838076673
46 ; ALL-NEXT: and x9, x1, #0xff
47 ; ALL-NEXT: mul x8, x9, x8
48 ; ALL-NEXT: str x8, [x0]
50 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 8, i1 0)
56 ; ALL: // %bb.0:
58 ; ALL-NEXT: mov x8, #72340172838076673
59 ; ALL-NEXT: and x9, x1, #0xff
60 ; ALL-NEXT: mul x8, x9, x8
61 ; ALL-NEXT: stp x8, x8, [x0]
63 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 16, i1 0)
69 ; GPR: // %bb.0:
71 ; GPR-NEXT: mov x8, #72340172838076673
72 ; GPR-NEXT: and x9, x1, #0xff
73 ; GPR-NEXT: mul x8, x9, x8
74 ; GPR-NEXT: stp x8, x8, [x0, #16]
75 ; GPR-NEXT: stp x8, x8, [x0]
79 ; NEON: // %bb.0:
83 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 32, i1 0)
89 ; GPR: // %bb.0:
91 ; GPR-NEXT: mov x8, #72340172838076673
92 ; GPR-NEXT: and x9, x1, #0xff
93 ; GPR-NEXT: mul x8, x9, x8
94 ; GPR-NEXT: stp x8, x8, [x0, #48]
95 ; GPR-NEXT: stp x8, x8, [x0, #32]
96 ; GPR-NEXT: stp x8, x8, [x0, #16]
97 ; GPR-NEXT: stp x8, x8, [x0]
101 ; NEON: // %bb.0:
106 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 %value, i64 64, i1 0)
114 ; ALL: // %bb.0:
116 ; ALL-NEXT: mov x8, #72340172838076673
117 ; ALL-NEXT: and x9, x1, #0xff
118 ; ALL-NEXT: mul x8, x9, x8
119 ; ALL-NEXT: stp x8, x8, [x0]
121 tail call void @llvm.memset.inline.p0.i64(ptr align 16 %a, i8 %value, i64 16, i1 0)
127 ; GPR: // %bb.0:
129 ; GPR-NEXT: mov x8, #72340172838076673
130 ; GPR-NEXT: and x9, x1, #0xff
131 ; GPR-NEXT: mul x8, x9, x8
132 ; GPR-NEXT: stp x8, x8, [x0, #16]
133 ; GPR-NEXT: stp x8, x8, [x0]
137 ; NEON: // %bb.0:
141 tail call void @llvm.memset.inline.p0.i64(ptr align 32 %a, i8 %value, i64 32, i1 0)
147 ; GPR: // %bb.0:
149 ; GPR-NEXT: mov x8, #72340172838076673
150 ; GPR-NEXT: and x9, x1, #0xff
151 ; GPR-NEXT: mul x8, x9, x8
152 ; GPR-NEXT: stp x8, x8, [x0, #48]
153 ; GPR-NEXT: stp x8, x8, [x0, #32]
154 ; GPR-NEXT: stp x8, x8, [x0, #16]
155 ; GPR-NEXT: stp x8, x8, [x0]
159 ; NEON: // %bb.0:
164 tail call void @llvm.memset.inline.p0.i64(ptr align 64 %a, i8 %value, i64 64, i1 0)
172 ; ALL: // %bb.0:
175 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 1, i1 0)
181 ; ALL: // %bb.0:
184 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 2, i1 0)
190 ; ALL: // %bb.0:
193 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 4, i1 0)
199 ; ALL: // %bb.0:
202 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 8, i1 0)
208 ; ALL: // %bb.0:
211 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 16, i1 0)
217 ; GPR: // %bb.0:
218 ; GPR-NEXT: adrp x8, .LCPI15_0
219 ; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI15_0]
224 ; NEON: // %bb.0:
228 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 32, i1 0)
234 ; GPR: // %bb.0:
235 ; GPR-NEXT: adrp x8, .LCPI16_0
236 ; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI16_0]
242 ; NEON: // %bb.0:
247 tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 64, i1 0)
255 ; ALL: // %bb.0:
258 tail call void @llvm.memset.inline.p0.i64(ptr align 16 %a, i8 0, i64 16, i1 0)
264 ; GPR: // %bb.0:
265 ; GPR-NEXT: adrp x8, .LCPI18_0
266 ; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI18_0]
271 ; NEON: // %bb.0:
275 tail call void @llvm.memset.inline.p0.i64(ptr align 32 %a, i8 0, i64 32, i1 0)
281 ; GPR: // %bb.0:
282 ; GPR-NEXT: adrp x8, .LCPI19_0
283 ; GPR-NEXT: ldr q0, [x8, :lo12:.LCPI19_0]
289 ; NEON: // %bb.0:
294 tail call void @llvm.memset.inline.p0.i64(ptr align 64 %a, i8 0, i64 64, i1 0)